PDM44038S12J datasheet, PDF - EEWORLD Datasheet

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PDM44038S12J: DescriptionCache SRAM, 64KX18, 12ns, CMOS, PQCC52; Categorystorage storage; File Size470KB，11 Pages; ManufacturerParadigm Technology Inc

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PDM44038S12J Overview

Cache SRAM, 64KX18, 12ns, CMOS, PQCC52

PDM44038S12J Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Paradigm Technology Inc
package instruction	QCCJ, LDCC52,.8SQ
Reach Compliance Code	unknown
ECCN code	3A991.B.2.A
Maximum access time	12 ns
Other features	SELF TIMED WRITE CYCLE; LINEAR BURST; BYTE WRITE
I/O type	COMMON
JESD-30 code	S-PQCC-J52
JESD-609 code	e0
memory density	1179648 bit
Memory IC Type	CACHE SRAM
memory width	18
Number of functions	1
Number of ports	1
Number of terminals	52
word count	65536 words
character code	64000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64KX18
Output characteristics	3-STATE
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC52,.8SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3/5,5 V
Certification status	Not Qualified
Maximum standby current	0.11 A
Minimum standby current	4.75 V
Maximum slew rate	0.34 mA
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED

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PDM44038S12J Related Products

	PDM44038S12J	PDM44038S12JI	PDM44038S14J	PDM44038S14JI
Description	Cache SRAM, 64KX18, 12ns, CMOS, PQCC52	Cache SRAM, 64KX18, 12ns, CMOS, PQCC52	Cache SRAM, 64KX18, 14ns, CMOS, PQCC52	Cache SRAM, 64KX18, 14ns, CMOS, PQCC52
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible
Maker	Paradigm Technology Inc	Paradigm Technology Inc	Paradigm Technology Inc	Paradigm Technology Inc
package instruction	QCCJ, LDCC52,.8SQ	QCCJ, LDCC52,.8SQ	QCCJ, LDCC52,.8SQ	QCCJ, LDCC52,.8SQ
Reach Compliance Code	unknown	unknown	unknown	unknown
ECCN code	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A	3A991.B.2.A
Maximum access time	12 ns	12 ns	14 ns	14 ns
Other features	SELF TIMED WRITE CYCLE; LINEAR BURST; BYTE WRITE	SELF TIMED WRITE CYCLE; LINEAR BURST; BYTE WRITE	SELF TIMED WRITE CYCLE; LINEAR BURST; BYTE WRITE	SELF TIMED WRITE CYCLE; LINEAR BURST; BYTE WRITE
I/O type	COMMON	COMMON	COMMON	COMMON
JESD-30 code	S-PQCC-J52	S-PQCC-J52	S-PQCC-J52	S-PQCC-J52
JESD-609 code	e0	e0	e0	e0
memory density	1179648 bit	1179648 bit	1179648 bit	1179648 bit
Memory IC Type	CACHE SRAM	CACHE SRAM	CACHE SRAM	CACHE SRAM
memory width	18	18	18	18
Number of functions	1	1	1	1
Number of ports	1	1	1	1
Number of terminals	52	52	52	52
word count	65536 words	65536 words	65536 words	65536 words
character code	64000	64000	64000	64000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	85 °C	70 °C	85 °C
organize	64KX18	64KX18	64KX18	64KX18
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE
Exportable	YES	YES	YES	YES
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCJ	QCCJ	QCCJ	QCCJ
Encapsulate equivalent code	LDCC52,.8SQ	LDCC52,.8SQ	LDCC52,.8SQ	LDCC52,.8SQ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE
Package form	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	3.3/5,5 V	3.3/5,5 V	3.3/5,5 V	3.3/5,5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Minimum standby current	4.75 V	4.75 V	4.75 V	4.75 V
Maximum supply voltage (Vsup)	5.25 V	5.25 V	5.25 V	5.25 V
Minimum supply voltage (Vsup)	4.75 V	4.75 V	4.75 V	4.75 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	J BEND	J BEND	J BEND	J BEND
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	QUAD	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED

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