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PDM41028LA20SOI

Description
Standard SRAM, 256KX4, 20ns, CMOS, PDSO28
Categorystorage    storage   
File Size81KB,10 Pages
ManufacturerParadigm Technology Inc
Download Datasheet Parametric View All

PDM41028LA20SOI Overview

Standard SRAM, 256KX4, 20ns, CMOS, PDSO28

PDM41028LA20SOI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerParadigm Technology Inc
package instructionSOJ, SOJ28,.44
Reach Compliance Codeunknown
ECCN code3A991.B.2.B
Maximum access time20 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J28
JESD-609 codee0
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width4
Number of functions1
Number of ports1
Number of terminals28
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize256KX4
Output characteristics3-STATE
ExportableYES
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ28,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Certification statusNot Qualified
Maximum standby current0.0005 A
Minimum standby current2 V
Maximum slew rate0.15 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
PDM41028
1 Megabit Static RAM
256K x 4-Bit
Features
s
High speed access times
Com’l: 10, 12, 15, 17 and 20 ns
Ind’l: 12, 15, 17 and 20 ns
s
Low power operation (typical)
- PDM41028SA
Active: 400 mW
Standby: 150 mW
- PDM41028LA
Active: 350 mW
Standby: 100 mW
s
Single +5V (±10%) power supply
s
TTL-compatible inputs and outputs
s
Packages
Plastic SOJ (300 mil) - TSO
Plastic SOJ (400 mil) - SO
Plastic TSOP - T
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Description
The PDM41028 is a high-performance CMOS static
RAM organized as 262,144 x 4 bits. This product is
produced in Paradigm’s proprietary CMOS
technology which offers the designer the highest
speed parts. Writing to this device is accomplished
when the write enable (WE) and the chip enable
(CE) inputs are both LOW. Reading is accomplished
when WE remains HIGH and CE and OE are both
LOW.
The PDM41028 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
compatible. The PDM41028 comes in two versions,
the standard power version PDM41028SA and a low
power version the PDM41028LA. The two versions
are functionally the same and only differ in their
power consumption.
The PDM41028 is available in a 28-pin 300-mil SOJ,
28-pin TSOP, and a 28-pin 400-mil SOJ for surface
mount applications.
Functional Block Diagram
Rev. 2.0 - 7/17/96
4-9
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