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IDT74LVC244APY8

Description
Bus Driver, LVC/LCX/Z Series, 2-Func, 4-Bit, True Output, CMOS, PDSO20, SOIC-20
Categorylogic    logic   
File Size105KB,6 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT74LVC244APY8 Overview

Bus Driver, LVC/LCX/Z Series, 2-Func, 4-Bit, True Output, CMOS, PDSO20, SOIC-20

IDT74LVC244APY8 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeSOIC
package instructionSSOP, SSOP20,.3
Contacts20
Reach Compliance Codenot_compliant
Control typeENABLE LOW
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length7.2 mm
Logic integrated circuit typeBUS DRIVER
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of digits4
Number of functions2
Number of ports2
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP20,.3
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)225
power supply3.3 V
Prop。Delay @ Nom-Sup5.9 ns
propagation delay (tpd)6.9 ns
Certification statusNot Qualified
Maximum seat height2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width5.3 mm

IDT74LVC244APY8 Preview

IDT74LVC244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS,
5 VOLT TOLERANT I/O
FEATURES:
0.5 MICRON CMOS Technology
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
1.27mm pitch SOIC, 0.65mm pitch SSOP,
0.635mm pitch QSOP, 0.65mm pitch TSSOP packages
Extended commercial range of – 40°C to +85°C
V
CC
= 3.3V ±0.3V, Normal Range
V
CC
= 2.3V to 3.6V, Extended Range
CMOS power levels (0.4µ W typ. static)
Rail-to-Rail output swing for increased noise margin
All inputs, outputs and I/O are 5 Volt tolerant
Supports hot insertion
IDT74LVC244A
DESCRIPTION:
The LVC244A device is organized as two 4-bit line drivers with separate
output-enable (OE) inputs. When
OE
is low, the device passes data from
the A inputs to the Y outputs. When
OE
is high, the outputs are in the high-
impedance state.
The LVC244A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
To ensure the high-impedance state during power up or power down,
OE
should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V system environ-
ment.
Drive Features for LVC244A:
– High Output Drivers:
±24mA
– Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
1
OE
1
2
OE
19
1
A
1
2
18
1
Y
1
2
A
1
11
9
2
Y
1
1
A
2
4
16
1
Y
2
2
A
2
13
7
2
Y
2
1
A
3
6
14
1
Y
3
2
A
3
15
5
2
Y
3
1
A
4
8
12
1
Y
4
2
A
4
17
3
2
Y
4
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1999 Integrated Device Technology, Inc.
AUGUST 1999
DSC-4614/-
IDT74LVC244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through
each V
CC
or GND
8LVC
Max.
– 0.5 to +6.5
– 0.5 to +6.5
– 65 to +150
– 50 to +50
– 50
±100
Unit
V
V
°C
mA
mA
mA
1
O E
1
A
1
2
Y
4
1
A
2
2
Y
3
1
A
3
2
Y
2
1
A
4
2
Y
1
1
2
3
4
5
6
7
8
9
10
SO20-2
SO20-7
SO20-8
SO20-9
20
19
18
17
16
15
14
13
12
11
V
CC
2
O E
1
Y
1
2
A
4
1
Y
2
2
A
3
1
Y
3
2
A
2
1
Y
4
2
A
1
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
G ND
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
SOIC/ SSOP/ QSOP/ TSSOP
TOP VIEW
CAPACITANCE
(T
A
= +25°C, f = 1.0MH
Z
)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
5.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
8LVC Link
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
Pin Names
xOE
xAx
xYx
Description
Output-enable Inputs (Active LOW)
Data Inputs
3-State Outputs
FUNCTION TABLE
(each buffer)
(1)
Inputs
xOE
L
L
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
xAx
H
L
X
Outputs
xYx
H
L
Z
2
IDT74LVC244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= – 40°C To +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
OFF
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input Leakage Current
High Impedance Output Current
(3-State Output pins)
Input/Output Power Off Leakage
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
or V
O
5.5V
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
3.6
V
IN
5.5V
(2)
Quiescent Power Supply
Current Variation
One input at V
CC
- 0.6V,
other inputs at V
CC
or GND
– 0.7
100
±50
– 1.2
10
10
500
µA
8LVC Link
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
I
= 0 to 5.5V
V
O
= 0 to 5.5V
Min.
1.7
2
Typ.
(1)
Max.
0.7
0.8
±5
±10
Unit
V
V
µA
µA
µA
V
mV
µA
NOTES:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
2. This applies in the disabled state only.
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
V
CC
= 2.7V
V
CC
= 3.0V
I
OL
= 12mA
I
OL
= 24mA
2.2
Max.
0.2
0.4
0.7
0.4
0.55
8LVC Link
Unit
V
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to +85°C.
3
IDT74LVC244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, TA = 25°C
V
CC
= 2.5V±0.2V
Symbol
Parameter
C
PD
Power Dissipation Capacitance per buffer/driver Outputs enabled
C
PD
Power Dissipation Capacitance per buffer/driver Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
V
CC
= 3.3V±0.3V
Typical
44
2
Unit
pF
pF
SWITCHING CHARACTERISTICS
(1)
V
CC
= 2.5V±0.2V
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SK
(o)
Parameter
Propagation Delay
xAx to xYx
Output Enable Time
xOE to xYx
Output Disable Time
xOE to xYx
Output Skew
(2)
Min.
Max.
Min.
V
CC
= 2.7V
Max.
6.9
8.6
6.8
V
CC
= 3.3V±0.3V
Min.
1.5
1.5
1.5
Max.
5.9
7.6
6.5
500
Unit
ns
ns
ns
ps
NOTES:
1. See test circuits and waveforms. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
4
IDT74LVC244A
3.3V CMOS OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
EXTENDED COMMERCIAL TEMPERATURE RANGE
TEST CONDITIONS
Symbol
V
LOAD
V
IH
V
T
V
LZ
V
HZ
C
L
V
CC
(1)
= 3.3V ±0.3V
6
2.7
1.5
300
300
50
6
2.7
1.5
300
300
50
TEST CIRCUITS AND WAVEFORMS
PROPAGATION DELAY
V
CC
(2)
= 2.5V ±0.2V Unit
2 x Vcc
V
Vcc
V
CC
/ 2
150
150
30
V
V
mV
mV
pF
8LVC Link
V
CC
(1)
= 2.7V
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
V
IH
V
T
0V
V
OH
V
T
V
OL
V
IH
V
T
0V
LVC Link
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Pulse
(1, 2)
Generator
V
IN
D.U.T.
500
C
L
V
OUT
V
LOAD
Open
GND
ENABLE AND DISABLE TIMES
ENABLE
CONTROL
INPUT
t
PZL
OUTPUT
SWITCH
NORMALLY
CLOSED
LOW
t
PZH
OUTPUT
SWITCH
NORMALLY
OPEN
HIGH
V
LOAD/2
V
T
t
PHZ
V
T
0V
t
PLZ
DISABLE
V
IH
V
T
0V
V
LOAD/2
V
OL+
V
LZ
V
OL
V
OH
V
OH-
V
HZ
0V
LVC Link
R
T
LVC Link
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
=
Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate
10MHz; t
F
2.5ns; t
R
2.5ns.
2. Pulse Generator for All Pulses: Rate
10MHz; t
F
2ns; t
R
2ns.
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other tests
Switch
V
LOAD
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS
CONTROL
t
REM
t
SU
t
H
V
IH
V
T
0V
V
IH
V
T
0V
V
IH
V
T
0V
V
IH
V
T
0V
LVC Link
GND
Open
8LVC Link
OUTPUT SKEW - tsk (x)
INPUT
t
PLH1
t
PHL1
SYNCHRONOUS
CONTROL
t
SU
t
H
V
IH
V
T
0V
V
OH
PULSE WIDTH
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
V
T
LVC Link
OUTPUT 1
t
SK
(x)
t
SK
(x)
V
T
V
OL
V
OH
V
T
OUTPUT 2
t
PLH2
t
PHL2
V
T
V
OL
t
SK
(x)
= t
PLH2
-
t
PLH1
or
t
PHL2
-
t
PHL1
LVC
NOTES:
1. For t
SK
(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For t
SK
(b) OUTPUT1 and OUTPUT2 are in the same bank.
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