EEWORLDEEWORLDEEWORLD

Part Number

Search

ABLS-LR-FREQ4-18-A-4-Y-T

Description
Parallel - Fundamental Quartz Crystal, 13MHz Min, 36MHz Max, ROHS COMPLIANT, SMD, 2 PIN
CategoryPassive components    Crystal/resonator   
File Size1MB,2 Pages
ManufacturerAbracon
Websitehttp://www.abracon.com/index.htm
Environmental Compliance  
Download Datasheet Parametric View All

ABLS-LR-FREQ4-18-A-4-Y-T Overview

Parallel - Fundamental Quartz Crystal, 13MHz Min, 36MHz Max, ROHS COMPLIANT, SMD, 2 PIN

ABLS-LR-FREQ4-18-A-4-Y-T Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerAbracon
package instructionROHS COMPLIANT, SMD, 2 PIN
Reach Compliance Codecompliant
Other featuresAT-CUT CRYSTAL; TAPE AND REEL
Ageing5 PPM/YEAR
Crystal/Resonator TypePARALLEL - FUNDAMENTAL
Drive level100 µW
frequency stability0.003%
frequency tolerance30 ppm
JESD-609 codee3
load capacitance18 pF
Manufacturer's serial numberABLS
Installation featuresSURFACE MOUNT
Maximum operating frequency36 MHz
Minimum operating frequency13 MHz
Maximum operating temperature60 °C
Minimum operating temperature-10 °C
physical sizeL11.4XB4.7XH4.2 (mm)/L0.449XB0.185XH0.165 (inch)
Series resistance30 Ω
surface mountYES
Terminal surfaceMatte Tin (Sn)
HC/49US (AT49) ULTRA LOW ESR
SMD LOW PROFILE CRYSTAL
ABLS-LR
Pb
RoHS
Compliant
11.5 x 4.8 x 4.2 mm
| | | | | | | | | | | | | | |
FEATURES:
• Ultra low ESR as low as 20 ohms for 4MHz, 85% lower than ABLS 4MHz
• Low negative resistance(-R) IC design can ensure high oscillation margin
• Tight stability and automotive grade temperature available
• Hermetically resistance weld sealed
APPLICATIONS:
• Low negative resistance u-controller design
for low frequency
• Wide range of automotive applications
• Industrial applications
STANDARD SPECIFICATIONS:
PARAMETERS
ABRACON P/N
Frequency
Operation Mode
Operating Temperature
Storage Temperature
Frequency Tolerance
Frequency Stability over the
Operating Temp. (Ref to +25°C)
Equivalent Series Resistance (R1)
Shunt Capacitance C
0
Load Capacitance C
L
Drive Level
Aging at 25°C Per Year
Insulation Resistance
Spurious Responses
Drive level dependency (DLD)
ABLS-LR Series
3.5 MHz to 36 MHz
AT cut (Fundamental)
TABLE 1: ESR
FREQUENCY (MHz) ESR (Ω) Max.
3.500000 - 3.999999
30
4.000000 - 4.999999
20
5.000000 - 5.999999
20
6.000000 - 6.999999
20
7.000000 - 8.999999
15
9.000000 - 12.999999
15
13.000000 - 19.999999
10
10
20.000000 - 36.000000
0°C to + 70°C (see options)
55°C to + 125°C
± 50 ppm max. (see options)
± 50 ppm max. (see options)
See Table 1
7pF max.
18pF (see options)
1 mW max., 100µW typical
± 5ppm max.
500 M
Ω
min at 100Vdc ± 15V
-3dB max.
from 1μW to 500μW
(
minimum 7 points tested)
Change in frequency (Maximum - Minimum)
Change in ESR (Maximum - Minimum)
Maximum ESR over DLD range
< Max ESR value
over DLD range < 25% of Max ESR value
OPTIONS & PART IDENTIFICATION:
(Left blank if standard)
Frequency
ABLS - LR - Frequency -
-
-
-
-
Packaging
XX.XXXX MHz
Load Capacitance
Please specify CL in pF or S
for Series (minimun 10pF)
Operating Temp.
A
-10°C to +60°C
B
-20°C to +70°C
C
-30°C to +70°C
N
-30°C to +85°C
D
-40°C to +85°C
J*
-40°C to +105°C
K*
-40°C to +125°C
L*
-55°C to +125°C
Freq. Tolerance
H5
± 5 ppm
1
± 10 ppm
7
± 15 ppm
2
± 20 ppm
3
± 25 ppm
4
± 30 ppm
T for Tape and Reel
Freq. Stability
U**
± 10 ppm
G
± 15 ppm
X
± 20 ppm
W
± 25 ppm
Y
± 30 ppm
H
± 35 ppm
Q
± 100 ppm
R
± 150 ppm
* Frequency stability ±50ppm, ±100ppm, ±150ppm only.
Contact ABRACON for tighter frequency stability.
** -10 to +60C only.
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
Revised: 05.05.09
30332 Esperanza, Rancho Santa Margarita, California 92688
tel 949-546-8000
|
fax 949-546-8001
| www.abracon.com
Visit www.abracon.com for Terms & Conditions of Sale
CCS installation crashed. . . . .
I cannot install Ware and Grace from the App Center. It’s been three days, and every time I try to install it, an error occurs halfway through. The error is always the same (PS: all antivirus and fire...
数码小叶 Microcontroller MCU
Problems with level conversion between FPGA and SJA1000 using SN74ALVC164245
FPGA and SJA1000 use SN74ALVC164245 for level conversion. AD0-AD7 of SJA1000 is connected to 1B1-1B8 of SN74ALVC164245, and 1DIR controls the direction. ALE, CS, WR, RD, and MODE of SJA1000 are connec...
shen19891209 FPGA/CPLD
ADC/DAC Special Study Part 2 - Principles
Chapter 2 Principles of ADC and DAC 1. Conversion Principle Digital quantity is represented by combining codes according to digits. For weighted codes, each code has a certain bit weight. In order to ...
七月七日晴 Analogue and Mixed Signal
Make a suggestion
I hope EEWORLD will set up a group and add all the members who bought Friendly Arm to the group. If you have any questions, you can communicate with each other. At the same time, Friendly Arm will pro...
jxb01033016 Embedded System
FPGA Serial Communication
FPGA (EP1C3T144) serial communication I send any data received 00, I changed the device settings, set a configuration device EPCS1 on the FPGA, and set the unused input pin to tri-state, the result is...
liujianhui Embedded System
Anyone got time to help me look at this?
/************************************************ Program function: MCU controls the buzzer to play the song "Wish you peace" ---------------------------------------------- Dip switch setting: turn th...
shyatupc Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 970  1137  1423  994  1390  20  23  29  21  28 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号