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TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
D
D
D
D
D
D
D
D
D
D
Meet CCITT/(D3/D4) Channel Bank
Recommendations for Input Signals
Greater than – 55 dBm0
Programmable Transmit and Receive Gain
Control With Pin-Selectable
Gain/Attenuation Levels
Includes Differential Output on the
TCM37C14A
Precision Switched-Capacitor Filters and
Converters
Improved Version TCM29C13A Series
COMBOs (CODEC and Filters)
Low Power CMOS
– Operating Mode . . . 70 mW Typical
– Power-Down Mode . . . 7 mW Typical
Internal Sample-and-Hold and Autozero
Functions
Precision Internal Voltage References
TCM37C14A Features Pin-Selectable
µ-Law
or A-Law Companding and Pin-Selectable
Master Clock Rate (1.536 MHz, 1.544 MHz,
and 2.048 MHz Available)
TCM37C15A is 2.048 MHz A-Law Only
TCM37C15A . . . DW OR N PACKAGE
(TOP VIEW)
V
BB
PWRO+
RIN
RS1
RS2
GSR
GS1
GS0
PCMIN
FSR
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
GSX
TS1
TS2
ANLGIN
AGND
PCMOUT
FSX
MCLK
DGND
TCM37C14A . . . DW PACKAGE
(TOP VIEW)
description
V
BB
PWRO+
PWRO –
RIN
RS1
RS2
GSR
GS1
GS0
CLKSEL
PCMIN
FSR
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
GSX
TS1
TS2
ANLGIN
AGND
TSX
PCMOUT
FSX
ASEL
MCLK
DGND
The TCM37C14A and TCM37C15A PCM combo with programmable gain control devices are single-chip PCM
combos (pulse-code-modulated CODECs with voice-band filtering). They are designed to perform transmit
encoding (A/D conversion) and receive decoding (D/A conversion), as well as the transmit and receive filtering
functions required to meet CCITT/(D3/D4) G.711 and G.714 specifications in a PCM system. Each device
provides all the functions required to interface a full-duplex, 4-line voice telephone circuit with a TDM
(time-division-multiplexed) system, and also perform the encoding and decoding of call progress tones. The
TCM37C14A and TCM37C15A are based on the proven TI TCM29C13A core, and have the added feature of
programmable transmit and receive gain.
Primary applications include line interface for digital transmission and switching of T1/E1 carrier (PABX [private
branch automatic exchange] and central office telephone systems), subscriber line concentrators, digital
encryption systems, and digital signal processing. They are intended to be used at the analog termination of
a PCM line or trunk to the POTS (plain old telephone system) local-loop line.
The TCM37C15A is available in 20-pin DW SOIC (small-outline IC) or 20-pin N PDIP (plastic dual-in-line
package) packages, and the TCM37C14A is available in a 24-pin DW SOIC package and includes differential
output. All are characterized for operation from – 40°C to 85°C.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1998, Texas Instruments Incorporated
POST OFFICE BOX 655303
•
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1
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
AVAILABLE OPTIONS
PACKAGE
TA
20 PIN
SMALL OUTLINE
(DW)
TCM37C15AIDW
PLASTIC DIP
(N)
TCM37C15AIN
24 PIN
SMALL OUTLINE
(DW)
TCM37C14AIDW
–40°C to 85°C
functional block diagram
Transmit Section
22
21
Auto Zero
TS1
TS2
Gain
Set
Transmit
Third-Order
Antialias
Low-Pass
Filter
(Analog)
Transmit
Sixth-Order
Low-Pass
Filter
(Switched Cap)
Fc = 3400 Hz
Transmit
Third-Order
High-Pass
Filter
(Switched Cap)
Fc = 200 Hz
17
Sample
and Hold
ADC
Output
Register
18
PCMOUT
TSX†
ANLGIN
GSX
20
23
16
Analog to
Digital Control
Logic
Receive Section
Control Section
Control
Logic
Buffer
14
FSX
MCLK
Reference
RIN
GSR
RS1
RS2
PWRO +
4
7
5
6
2
Filter
Gain
Set
10
CLKSEL†
15
ASEL†
9
GS0
8
GS1
Digital-to-
Analog
Converter
Digital-to-
Analog Control
Logic
Input
Register
11
PCMIN
PWRO –†
3
24
VCC
1
VBB
13
DGND
19
AGND
12
FSR
† TCM37C14A only
NOTE A: Terminal numbers shown are for the TCM37C14A.
2
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DALLAS, TEXAS 75265
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
Terminal Functions
TERMINAL
NAME
AGND
ANLGIN
ASEL
CLKSEL
NO.
’37C15A ’37C14A
15
16
19
20
15
10
I
I
I
Analog ground return for all internal voice circuits. AGND is connected internally to DGND.
Analog input to transmit operational amplifier.
Selection between A-law and
µ-law
operation. When ASEL is connected to VBB, A-law is selected.
When ASEL is connected to VCC or ground,
µ-law
is selected.
Clock frequency selection. CLKSEL must be connected to VBB, VCC, or ground to select the master
clock frequency. When CLKSEL is tied to VBB, MCLK is 2.048 MHz. When it is tied to ground, MCLK
is at 1.544 MHz. When it is tied to VCC, MCLK is 1.536 MHz.
Digital ground for all internal logic circuits. DGND is internally connected to AGND.
I
I
I
Frame-synchronization clock input/time-slot enable for receive channel. The receive channel enters
the standby state when FSR is held low for 300 ms.
Frame-synchronization clock input/time-slot enable for transmit. The transmit channel enters the
standby state when FSX is held low for 300 ms.
Input for first bit of the programmable gain control circuitry. GS0 works in combination with GS1 to
simultaneously control transmit and receive gain, and controls power-down instruction. (See
Table 1 and 2 for control logic information.)
Input for second bit of the programmable gain control circuitry. GS1 works in combination with GS0
to simultaneously control transmit and receive gain, and controls power-down instruction. (See Table
1 and 2 for control logic information.)
Input to gain-setting network of the output power amplifier. Gain is set by external resistors with three
levels of programmable gain or attenuation control. (See Figure 6 and Figure 7 for recommended
configuration.)
Output terminal of internal uncommitted operational amplifier. Internally, GSX is the voice signal input
to the transmit filter.
Master clock (input). For the TCM37C14A, the master clock frequency can be either 2.048 MHz,
1.544 MHz, or 1.536 MHz, and is selected by CLKSEL. MCLK for the TCM37C15A is 2.048 MHz.
Receive PCM input. PCM data is clocked in on PCMIN on eight consecutive negative transitions of
the receive data clock (MCLK).
Transmit PCM output. PCM data is clocked out on PCMOUT on eight consecutive positive transitions
of the transmit data clock (MCLK).
Noninverting output of power amplifier. PWRO+ can drive transformer hybrids or high-impedance
loads directly in a differential or a single-ended configuration.
Inverting output of power amplifier. PWRO – is functionally identical with and complementary to
PWRO +.
Input to receive section amplifiers. (See Figure 6 and Figure 7 for recommended circuitry.)
Terminal for first gain-control resistor of the receive section. RS1 is selected through closure of the
first gain control switch. (See Figure 6 and Figure 7 for recommended circuitry.)
Terminal for second gain control resistor of the receive section. RS2 is selected through closure of
the second gain control switch. (See Figure 6 and Figure 7 for recommended configuration.)
Terminal for gain-control resistor on input of transmit section. TS1 is selected through closure of the
first gain-control switch. (See Figure 6 and Figure 7 for recommended configuration.)
Terminal for gain-control resistor on input of transmit section. TS2 is selected through closure of the
second gain-control switch. (See Figure 6 and Figure 7 for recommended configuration.)
O
Transmit channel time-slot strobe for the transmit channel (active low). TSX is an open drain output
and can be used as an enable signal for a 3-state output buffer.
Negative supply voltage. Input is – 5 V
±
5%.
Positive supply voltage. Input is 5 V
±
5%.
I/O
DESCRIPTION
DGND
FSR
FSX
GS0
11
10
13
8
13
12
16
9
GS1
7
8
I
GSR
6
7
I
GSX
MCLK
PCMIN
PCMOUT
PWRO +
PWRO –
RIN
RS1
RS2
TS1
TS2
TSX
VBB
VCC
19
12
9
14
2
23
14
11
17
2
3
O
I
I
O
O
O
I
3
4
5
18
17
4
5
6
22
21
18
1
20
1
24
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3
TCM37C14A, TCM37C15A
PCM COMBO WITH PROGRAMMABLE GAIN CONTROL
SLWS018B – JUNE 1996 – REVISED MAY 1998
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
†
Supply voltage, V
CC
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Supply voltage, V
BB
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 7 V
Voltage range at any analog input, V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
CC
+ 0.3 V to V
BB
– 0.3 V
Continuous total power dissipation at (or below) 25°C free-air temperature . . . . . . . . . . . . . . . . . . . 1300 mW
Operating free-air temperature range, T
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package . . . . . . . . . . . . . . . 260°C
JEDEC Latch up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
250 mA or
±
10 V
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Voltage values are with respect to GND.
recommended operating conditions (see Note 2)
MIN
Supply voltage, VCC (see Notes 2 and 3)
Supply voltage, VBB
DGND voltage with respect to AGND
High-level input voltage, VIH
Low-level input voltage, VIL
Load resistance, RL
resistance
Load capacitance, CL
capacitance
Operating free-air temperature, TA
At GSX/GSR
At PWRO + and/or PWRO –
At GSX/GSR
At PWRO + and/or PWRO –
–40
10
300
50
100
85
2.2
0.8
4.75
– 4.75
NOM
5
–5
0
MAX
5.25
– 5.25
UNIT
V
V
V
V
V
kΩ
Ω
pF
°C
NOTES: 2. To avoid possible damage to these CMOS devices and resulting reliability problems, the power-up procedure described in the device
power-up sequence paragraphs later in this document should be followed.
3. Voltages at analog inputs and outputs, VCC and VBB terminals, are with respect to the AGND terminal. All other voltages are
referenced to the DGND terminal unless otherwise noted.
4
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