datasheet
EEWORLDEEWORLDEEWORLD
Datasheet
Part Number

Keyword

Search
Keyword

Part Number

Search
Datasheet> All Categories > logic> logic> IDT74LVC273AP
PDF
Preview

IDT74LVC273AP

Description
D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, TSSOP-20
Categorylogic    logic   
File Size70KB，6 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

IDT74LVC273AP Overview

D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, TSSOP-20

IDT74LVC273AP Parametric

Parameter NameAttribute value
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts20
Reach Compliance Codeunknown
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length6.5 mm
Logic integrated circuit typeD FLIP-FLOP
Number of digits8
Number of functions1
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
propagation delay (tpd)9.5 ns
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
width4.4 mm

IDT74LVC273AP Preview

IDT74LVC273A
3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS OCTAL D-TYPE
FLIP-FLOP WITH RESET,
POSITIVE EDGE TRIGGER,
AND 5 VOLT TOLERANT I/O
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4μ W typ. static)
μ
• Rail-to-rail output swing for increased noise margin
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP and TSSOP packages
IDT74LVC273A
DESCRIPTION:
The octal D-type flip-flop with reset, positive edge trigger is built using
advanced dual metal CMOS technology. This high-speed, low power
device is ideal for driving high capacitance loads such as memory address
and data buses.
All pins can be driven from either 3.3V or 5V devices. This feature allows
the use of these devices as translators in a mixed 3.3V/5V supply system.
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
FUNCTIONAL BLOCK DIAGRAM
D
x
CP
D
CP
CLR
Q
O
x
CLR
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 2006 Integrated Device Technology, Inc.
JUNE 2006
DSC-4595/4
IDT74LVC273A
3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
CLR
O
0
D
0
D
1
O
1
O
2
D
2
D
3
O
3
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SSOP/ TSSOP
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
Description
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through each
V
CC
or GND
Max
–0.5 to +6.5
–65 to +150
–50 to +50
–50
±100
Unit
V
°C
mA
mA
mA
V
CC
O
7
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output Capacitance
I/O Port Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
5.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
NOTE:
1. As applicable to the device type.
PIN DESCRIPTION
Pin Names
CLR
CP
Ox
Dx
Clear Input
Clock Input
Data Outputs
Data Inputs
Description
FUNCTION TABLE
(1)
Inputs
CLR
L
H
H
CP
X
↑
↑
Dx
X
L
H
Internal
Q Value
L
L
H
Outputs
Ox
L
L
H
Function
Clear Register
Load Input Data
Load Input Data
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑
= LOW-to-HIGH Transition
2
IDT74LVC273A
3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= –40°C to +85°C
Symbol
V
IH
Parameter
Input HIGH Voltage Level
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
OFF
V
IK
V
H
I
CCL
I
CCH
I
CCZ
ΔI
CC
High Impedance Output Current
(3-State Output pins)
Input/Output Power Off Leakage
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
or V
O
≤
5.5V
V
CC
= 2.3V, I
IN
= –18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
—
—
—
—
—
—
—
–0.7
100
—
—
—
±50
–1.2
—
10
10
500
µA
V
mV
µA
V
CC
= 3.6V
V
O
= 0 to 5.5V
—
—
±10
µA
Input LOW Voltage Level
Input Leakage Current
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
I
= 0 to 5.5V
Test Conditions
Min.
1.7
2
—
—
—
Typ.
(1)
—
—
—
—
—
Max.
—
—
0.7
0.8
±5
µA
V
Unit
V
Quiescent Power Supply Current
Variation
3.6
≤
V
IN
≤
5.5V
(2)
One input at V
CC
- 0.6V, other inputs at V
CC
or GND
µA
NOTES:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
2. This applies in the disabled state only.
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3V
V
CC
= 3V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3V
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
I
OL
= 12mA
I
OL
= 24mA
Test Conditions
(1)
V
CC
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
2.2
—
—
—
—
—
Max.
—
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
V
Unit
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate V
CC
range.
T
A
= – 40°C to + 85°C.
3
IDT74LVC273A
3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET
INDUSTRIAL TEMPERATURE RANGE
OPERATING CHARACTERISTICS, V
CC
= 3.3V ± 0.3V, T
A
= 25°C
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance per Transceiver Outputs enabled
Power Dissipation Capacitance per Transceiver Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
Unit
pF
—
—
SWITCHING CHARACTERISTICS
(1)
V
CC
= 2.7V
Symbol
t
PLH
t
PHL
t
S
t
H
t
REC
t
WCLR
t
WCP
t
SK
(o)
Parameter
Propagation Delay, CP to Ox
Propagation Delay,
CLR
to Ox
Data Setup Time, Dx to CP
Data Hold Time, Dx to CP
CLR
Recovery Time,
CLR
to CP
CLR
Pulse Width, LOW
CLK Pulse Width, HIGH or LOW
Output Skew
(2)
Min.
1.5
1.5
2.5
1.5
2
3.3
3.3
Max.
9.5
9.5
V
CC
= 3.3V ± 0.3V
Min.
1.5
1.5
2.5
1.5
2
3.3
3.3
Max.
8.5
8.5
Unit
ns
ns
ns
ns
ns
ns
ns
ps
—
—
—
—
—
—
—
—
—
—
—
—
500
—
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. T
A
= – 40°C to + 85°C.
2. Skew between any two outputs of the same package and switching in the same direction.
4
IDT74LVC273A
3.3V CMOS OCTAL D-TYPE FLIP-FLOP WITH RESET
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CONDITIONS
Symbol
V
LOAD
V
IH
V
T
V
LZ
V
HZ
C
L
V
CC(1)
= 3.3V±0.3V V
CC(1)
= 2.7V
6
2.7
1.5
300
300
50
6
2.7
1.5
300
300
50
V
CC(2)
= 2.5V±0.2V
2 x Vcc
Vcc
Vcc / 2
150
150
30
Unit
V
V
V
mV
mV
pF
SAME PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE PHASE
INPUT TRANSITION
t
PHL
t
PHL
V
IH
V
T
0V
V
OH
V
T
V
OL
V
IH
V
T
0V
LVC Link
Propagation Delay
V
CC
500Ω
Pulse
(1, 2)
Generator
V
IN
D.U.T.
R
T
500Ω
C
L
LVC Link
V
LOAD
Open
GND
V
OUT
ENABLE
CONTROL
INPUT
t
PZL
OUTPUT
SWITCH
NORMALLY
V
LOAD
LOW
t
PZH
OUTPUT
SWITCH
NORMALLY
GND
HIGH
V
LOAD/2
V
T
t
PHZ
V
T
0V
t
PLZ
DISABLE
V
IH
V
T
0V
V
LOAD/2
V
OL+
V
LZ
V
OL
V
OH
V
OH-
V
HZ
0V
LVC Link
Test Circuit for All Outputs
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate
≤
10MHz; t
F
≤
2.5ns; t
R
≤
2.5ns.
2. Pulse Generator for All Pulses: Rate
≤
10MHz; t
F
≤
2ns; t
R
≤
2ns.
Enable and Disable Times
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
Disable High
Enable High
All Other Tests
Switch
V
LOAD
GND
Open
DATA
INPUT
TIMING
INPUT
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
V
IH
V
T
0V
V
OH
V
T
V
OL
V
OH
V
T
V
OL
t
SU
t
H
t
REM
t
SU
t
H
V
IH
V
T
0V
V
IH
V
T
0V
V
IH
V
T
0V
V
IH
V
T
0V
LVC Link
INPUT
Set-up, Hold, and Release Times
t
PLH1
t
PHL1
OUTPUT 1
t
SK
(x)
t
SK
(x)
LOW-HIGH-LOW
PULSE
t
W
HIGH-LOW-HIGH
PULSE
V
T
OUTPUT 2
t
PLH2
t
PHL2
V
T
Pulse Width
LVC Link
LVC Link
t
SK
(x)
= t
PLH2
-
t
PLH1
or
t
PHL2
-
t
PHL1
Output Skew - t
SK
(
X
)
NOTES:
1. For t
SK
(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For t
SK
(b) OUTPUT1 and OUTPUT2 are in the same bank.
5
More (Only the first 5 pages are displayed. Please Download Datasheet to view the full content.) >

IDT74LVC273AP Related Products

IDT74LVC273AP IDT74LVC273APYG8 74LVC273APGG8 74LVC273APG8 74LVC273APYG8 74LVC273APY8
Description D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, TSSOP-20 D Flip-Flop, LVC/LCX/Z Series, 1-Func, Positive Edge Triggered, 8-Bit, True Output, CMOS, PDSO20, SSOP-20 TSSOP-20, Reel TSSOP-20, Reel SSOP-20, Reel SSOP-20, Reel
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP SSOP TSSOP TSSOP SSOP SSOP
Contacts 20 20 20 20 20 20
Reach Compliance Code unknown unknown unknown not_compliant unknown not_compliant
JESD-30 code R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e3 e3 e0 e3 e0
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP D FLIP-FLOP
Number of functions 1 1 1 8 1 8
Number of terminals 20 20 20 20 20 20
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP SSOP TSSOP TSSOP SSOP SSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface TIN LEAD Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Tin/Lead (Sn85Pb15) Matte Tin (Sn) - annealed Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm 0.635 mm 0.65 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL DUAL DUAL
Trigger type POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE POSITIVE EDGE
package instruction TSSOP, SSOP, SSOP20,.3 TSSOP-20 - SSOP-20 -
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z - LVC/LCX/Z -
length 6.5 mm 7.2 mm 6.5 mm - 7.2 mm -
Number of digits 8 8 8 - 8 -
Output polarity TRUE TRUE TRUE - TRUE -
propagation delay (tpd) 9.5 ns 9.5 ns 9.5 ns - 9.5 ns -
Maximum seat height 1.2 mm 2 mm 1.2 mm - 2 mm -
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V - 3.6 V -
Minimum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V - 2.7 V -
width 4.4 mm 5.3 mm 4.4 mm - 5.3 mm -
Is it Rohs certified? - conform to conform to incompatible conform to incompatible
Load capacitance (CL) - 50 pF 50 pF 50 pF 50 pF 50 pF
MaximumI(ol) - 0.024 A 0.024 A 0.024 A 0.024 A 0.024 A
Humidity sensitivity level - 1 1 1 1 1
Encapsulate equivalent code - SSOP20,.3 TSSOP20,.25 TSSOP20,.25 SSOP20,.3 SSOP20,.3
method of packing - TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL TAPE AND REEL
Peak Reflow Temperature (Celsius) - 260 260 240 260 240
power supply - 3.3 V 3.3 V 3.3 V 3.3 V 3.3 V
Maximum time at peak reflow temperature - 30 30 NOT SPECIFIED 30 NOT SPECIFIED
Brand Name - - Integrated Device Technology Integrated Device Technology Integrated Device Technology Integrated Device Technology
Is it lead-free? - - Lead free Contains lead Lead free Contains lead
Manufacturer packaging code - - PGG20 PG20 PYG20 PY20

Recommended Resources

Continuous timing circuit diagram for delayed monostable multivibrator

common gate amplifier circuit

Fourth gear delay self-extinguishing circuit

Parallel regulated power supply circuit diagram using TL431

5V, 1A uninterrupted DC regulated power supply circuit diagram

±15v tracking regulated power supply four

What is Surface Mount
Surface Mount Technology, also known as "Surface Mount Technology" in English, or SMT for short, is a circuit assembly technology that attaches and solders surface mount components to specified positi...
leslie PCB Design
I would like to ask what does #include "Driver\DrvADC.h" mean?
I would like to ask what does #include "Driver\DrvADC.h" mean? Why do I need to add Driver\?...
馨曦 MCU
Can the functions of intelligent video surveillance be customized?
Is it similar to our general SMS packages, with basic functions and customizable functions?...
小瑞 Industrial Control Electronics
How to use mixed C and assembly programming to load C programs into fixed memory units
Normally, C programs are randomly loaded into memory during compilation. Can an expert tell me how to load a C program into a fixed memory location using mixed C and assembly programming? Thank you!...
还我今生 Embedded System
vdh classic routine
Very suitable for VDHL beginners...
zengpeipei MCU
It’s Chinese New Year! I wish you all a happy new year and all the best!
It's a busy New Year's Eve. I've been busy since early morning. I just had some free time~ Here, I wish you all a happy new year~~ I wish you all a happy new year and all the best! ! ! !...
okhxyyo Talking
Shortcut:   S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 SA SB SC SD SE SF SG SH SI SJ SK SL SM SN SO SP SQ SR SS ST SU SV SW SX SY SZ T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 TA TB TC TD TE TF TG TH TI TJ TK TL TM TN TO TP TQ TR TS TT TU TV TW TX TY TZ U0 U1 U2 U3 U4 U6 U7 U8 UA UB UC UD UE UF UG UH UI UJ UK UL UM UN UP UQ UR US UT UU UV UW UX UZ V0 V1 V2 V3 V4 V5 V6 V7 V8 V9 VA VB VC VD VE VF VG VH VI VJ VK VL VM VN VO VP VQ VR VS VT VU VV VW VX VY VZ W0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF WG WH WI WJ WK WL WM WN WO WP WR WS WT WU WV WW WY X0 X1 X2 X3 X4 X5 X7 X8 X9 XA XB XC XD XE XF XG XH XK XL XM XN XO XP XQ XR XS XT XU XV XW XX XY XZ Y0 Y1 Y2 Y4 Y5 Y6 Y9 YA YB YC YD YE YF YG YH YK YL YM YN YP YQ YR YS YT YX Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z8 ZA ZB ZC ZD ZE ZF ZG ZH ZJ ZL ZM ZN ZP ZR ZS ZT ZU ZV ZW ZX ZY

Popular Components

  1. X40430SB
  2. PBMN25B20AA21405201000
  3. 409B-A-0301-B-001500
  4. 68783-326
  5. HVRW29L2403B4
  6. MGA2815DZ/ES
  7. 1SMB5919B
  8. TOMCT16031321CT1
  9. KBL410
  10. SC2128C-D90D
  11. D2541HM-5P-BL-G30
  12. ST0805K3M9P200.25W

Popular Articles

  1. Laird Connectivity Sentrius BT610 I/O Sensor Now Available at Mouser
  2. The first week's discounted games for the "Tencent Nintendo Switch 2nd Anniversary Celebration" have been announced
  3. Xinjie Energy: The company's SiC MOSFET and other products are in the tape-out verification stage
  4. Apple 2022 Spring Conference Decoded! New iPhone/iPad configurations/prices are reasonable
  5. 20 Questions and Solutions on MCU Delay Problems
  6. Sanan Optoelectronics: The company's Mini LED chips have been supplied to customers in batches
  7. Infineon launches new generation MOTIX™ half-bridge driver IC
  8. How to use the clamp type ground resistance tester correctly
  9. Mitsubishi PLC ladder diagram symbol explanation
  10. How to make PLC programming easier?

Technical ResourceMore

  1. X-ray diffraction experimental technology training materials
  2. 75N75 pdf
  3. PLC hardware composition and working principle
  4. Analysis of the pros and cons of RFID technology in libraries and its solutions
  5. Study on the Performance of CIC Filter in Modulator Application
  6. Comments on the C language code entry function (start_armboot) in uboot
  7. MCU Example Learning Demonstration
  8. BASIC Programmable Hardware Instruction Manual
  9. C compiler for PIC microcontrollers (software)
  10. Analysis of the advantages of high-precision real-time clock of ferroelectric memory

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

About Us Customer Service Contact Information Datasheet Sitemap LatestNews
Index Files: 2460  407  1659  1347  416  50  9  34  28  55 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号