PRELIMINARY
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
ICS8533I-31
General Description
The ICS8533I-31 is a low skew, high performance
1-to-4 Crystal Oscillator/Differential-to-3.3V
HiPerClockS™
LVPECL Fanout Buffer and a member of the
HiPerClockS™ family of High Performance Clock
Solutions from IDT. The ICS8533I-31 has selectable
differential clock or crystal inputs. The CLK, nCLK pair can accept
most standard differential input levels. The clock enable is
internally synchronized to eliminate runt pulses on the outputs
during asynchronous assertion/deassertion of the clock enable
pin.
Features
•
•
•
•
•
•
•
•
•
•
•
Four differential LVPECL output pairs
Selectable differential CLK/nCLK or crystal oscillator interface
Maximum output frequency: 650MHz
Translates any single-ended input signal to 3.3V LVPECL levels
with resistor bias on nCLK input
Additive phase jitter, RMS: TBD
Output skew: 25ps (typical)
Part-to-part skew: 150ps (typical)
Propagation delay: 1.5ns (typical)
Full 3.3V supply mode
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS
Guaranteed output and part-to-part skew characteristics make the
ICS8533I-31 ideal for those applications demanding well defined
performance and repeatability.
Block Diagram
CLK_EN
Pullup
D
Q
CLK
Pulludown
nCLK
Pullup
LE
0
Q0
nQ0
XTAL_IN
Q1
Pin Assignment
V
EE
CLK_EN
CLK_SEL
CLK
nCLK
XTAL_IN
XTAL_OUT
nc
nc
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
Q0
nQ0
V
CC
Q1
nQ1
Q2
nQ2
V
CC
Q3
nQ3
OSC
XTAL_OUT
CLK_SEL
Pulludown
1
nQ1
Q2
nQ2
Q3
nQ3
ICS8533I-31
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm
package body
G Package
Top View
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.
Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT™ / ICS™
3.3V LVPECL FANOUT BUFFER
1
ICS8533AGI-31 REV. A DECEMBER 13, 2007
ICS8533I-31
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/DIFFERENTIAL-TO- 3.3V LVPECL FANOUT BUFFER
PRELIMINARY
Table 1. Pin Descriptions
Number
1
2
Name
V
EE
CLK_EN
Power
Input
Pullup
Type
Description
Negative supply pin.
Synchronizing clock enable. When HIGH, clock outputs follows clock input.
When LOW, Q outputs are forced low, nQ outputs are forced high. LVCMOS /
LVTTL interface levels.
Clock select input. When LOW, selects CLK, nCLK input.
When HIGH, selects XTAL input. LVCMOS / LVTTL interface levels.
Non-inverting differential clock input.
Inverting differential clock input.
Crystal oscillator interface XTAL_IN is the input, XTAL_OUT is the output.
No connect.
Power supply pins.
Differential clock output pair. LVPECL interface levels.
Differential clock output pair. LVPECL interface levels.
Differential clock output pair. LVPECL interface levels.
Differential clock output pair. LVPECL interface levels.
3
4
5
6,
7
8, 9
10, 13, 18
11, 12
14, 15
16, 17
19, 20
CLK_SEL
CLK
nCLK
XTAL_IN
XTAL_OUT
nc
V
CC
nQ3, Q3
nQ2, Q2
nQ1, Q1
nQ0, Q0
Input
Input
Input
Input
Unused
Power
Output
Output
Output
Output
Pulldown
Pulldown
Pullup
NOTE:
Pullup
refers to internal input resistors. See Table 2,
Pin Characteristics,
for typical values.
Table 2. Pin Characteristics
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
k
Ω
k
Ω
IDT™ / ICS™
3.3V LVPECL FANOUT BUFFER
2
ICS8533AGI-31 REV. A DECEMBER 13, 2007
ICS8533I-31
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/DIFFERENTIAL-TO- 3.3V LVPECL FANOUT BUFFER
PRELIMINARY
Function Tables
Table 3A. Control Input Function Table
Inputs
CLK_EN
0
0
1
1
CLK_SEL
0
1
0
1
Selected Source
CLK, nCLK
XTAL_IN, XTAL_OUT
CLK, nCLK
XTAL_IN, XTAL_OUT
Q0:Q3
Disabled; Low
Disabled; Low
Enabled
Enabled
Outputs
nQ0:nQ3
Disabled; High
Disabled; High
Enabled
Enabled
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock or crystal oscillator edge as
shown in Figure 1. In the active mode, the state of the outputs are a function of the CLK, nCLK and XTAL inputs as described in Table 3B.
nCLK
CLK
Disabled
Enabled
CLK_EN
nQ0:nQ3
Q0:Q3
Figure 1. CLK_EN Timing Diagram
Table 3B. Clock Input Function Table
Inputs
CLK
0
1
0
1
Biased; NOTE 1
Biased; NOTE 1
nCLK
1
0
Biased; NOTE 1
Biased; NOTE 1
0
1
Q0:Q3
LOW
HIGH
LOW
HIGH
HIGH
LOW
Outputs
nQ0:nQ3
HIGH
LOW
HIGH
LOW
LOW
HIGH
Input to Output Mode
Differential to Differential
Differential to Differential
Single-ended to Differential
Single-ended to Differential
Single-ended to Differential
Single-ended to Differential
Polarity
Non inverting
Non inverting
Non inverting
Non inverting
Inverting
Inverting
IDT™ / ICS™
3.3V LVPECL FANOUT BUFFER
3
ICS8533AGI-31 REV. A DECEMBER 13, 2007
ICS8533I-31
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/DIFFERENTIAL-TO- 3.3V LVPECL FANOUT BUFFER
PRELIMINARY
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under
Absolute Maximum Ratings
may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics or AC Characteristics
is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
Item
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuos Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
Rating
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
91.12°C/W (0 mps)
-65°C to 150°C
DC Electrical Characteristics
Table 4A. Power Supply DC Characteristics,
V
EE
= 3.3V ± 5%, V
CC
= 0V, T
A
= -40°C to 85°C
Symbol
V
CC
I
EE
Parameter
Power Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
Typical
3.3
40
Maximum
3.465
Units
V
mA
Table 4B. LVCMOS/LVTTL DC Characteristics,
V
EE
= 3.3V ± 5%, V
CC
= 0V, T
A
= -40°C to 85°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
CLK_EN
Input High Current
CLK_SEL
CLK_EN
I
IL
Input Low Current
CLK_SEL
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
V
CC
= 3.465V, V
IN
= 0V
-150
-5
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
5
150
Units
V
V
µA
µA
µA
µA
IDT™ / ICS™
3.3V LVPECL FANOUT BUFFER
4
ICS8533AGI-31 REV. A DECEMBER 13, 2007
ICS8533I-31
LOW SKEW, 1-TO-4, CRYSTAL OSCILLATOR/DIFFERENTIAL-TO- 3.3V LVPECL FANOUT BUFFER
PRELIMINARY
Table 4C. Differential DC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
I
IH
Parameter
nCLK
Input High Current
CLK
nCLK
I
IL
Input Low Current
CLK
V
PP
V
CMR
Peak-to-Peak Voltage; NOTE 1
Common Mode Input Voltage; NOTE 1, 2
Test Conditions
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V,
V
IN
= 0V
V
CC
= 3.465V,
V
IN
= 0V
-150
-5
0.15
V
EE
+ 0.5
1.3
V
CC
– 0.85
Minimum
Typical
Maximum
5
150
Units
µA
µA
µA
µA
V
V
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as V
IH
.
Table 4D. LVPECL DC Characteristics,
V
CC
= 3.3V ± 5%, V
EE
= 0V, T
A
= -40°C to 85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
– 1.4
V
CC
– 2.0
0.6
Typical
Maximum
V
CC
– 0.9
V
CC
– 1.7
1.0
Units
V
V
V
NOTE 1: Output termination with 50Ω to V
CC
– 2V.
Table 5. Crystal Characteristics
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
14
Test Conditions
Minimum
Typical
Fundamental
25
50
7
1
MHz
Maximum
Units
Ω
pF
mW
IDT™ / ICS™
3.3V LVPECL FANOUT BUFFER
5
ICS8533AGI-31 REV. A DECEMBER 13, 2007
京公网安备 11010802033920号
EEWORLD
