GAL20V8-20LVI datasheet, PDF - EEWORLD Datasheet

GAL20V8-20LVI: DescriptionEE PLD, 20ns, PQCC28, PLASTIC, LCC-28; CategoryProgrammable logic devices Programmable logic; File Size1MB，20 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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GAL20V8-20LVI Overview

EE PLD, 20ns, PQCC28, PLASTIC, LCC-28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Texas Instruments
package instruction	QCCJ, LDCC28,.5SQ
Reach Compliance Code	unknown
Other features	POWER-UP RESET; REGISTER PRELOAD
Architecture	PAL-TYPE
maximum clock frequency	33.3 MHz
JESD-30 code	S-PQCC-J28
JESD-609 code	e0
length	11.43 mm
Dedicated input times	12
Number of I/O lines	8
Number of entries	20
Output times	8
Number of product terms	64
Number of terminals	28
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	12 DEDICATED INPUTS, 8 I/O
Output function	MACROCELL
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC28,.5SQ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	EE PLD
propagation delay	20 ns
Certification status	Not Qualified
Maximum seat height	4.57 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.43 mm

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