Intel® Wireless Flash Memory (W18)
28F320W18, 28F640W18, 28F128W18
Datasheet
Product Features
■
■
■
High Performance Read-While-Write/
Erase
— Burst frequency at 66 MHz
(zero wait states)
— 60 ns Initial access read speed
— 11 ns Burst mode read speed
— 20 ns Page mode read speed
— 4-, 8-, 16-, and Continuous-Word Burst
mode reads
— Burst and Page mode reads in all
Blocks, across all partition boundaries
— Burst Suspend feature
— Enhanced Factory Programming at
3.1 µs/word
Security
— 128-bit OTP Protection Register:
64 unique pre-programmed bits +
64 user-programmable bits
— Absolute Write Protection with V
PP
at
ground
— Individual and Instantaneous Block
Locking/Unlocking with Lock-Down
Capability
Quality and Reliability
— Temperature Range: –40 °C to +85 °C
— 100K Erase Cycles per Block
— 90 nm ETOX™ IX Process
— 130 nm ETOX™ VIII Process
■
■
■
Architecture
—Multiple 4-Mbit partitions
—Dual Operation: RWW or RWE
—Parameter block size = 4-Kword
—Main block size = 32-Kword
—Top or bottom parameter devices
—16-bit wide data bus
Software
—5 µs (typ.) Program and Erase Suspend
latency time
—Flash Data Integrator (FDI) and
Common Flash Interface (CFI)
Compatible
—Programmable WAIT signal polarity
Packaging and Power
—90 nm: 32- and 64-Mbit in VF BGA
—130 nm: 32-, 64-, and 128-Mbit in VF
BGA; 128-Mbit in QUAD+ package
—56 Active Ball Matrix, 0.75 mm Ball-
Pitch
—V
CC
= 1.70 V to 1.95 V
—V
CCQ
(90 nm) = 1.70 V to 1.95 V
—V
CCQ
(130 nm) = 1.70 V to 2.24 V or
1.35 V to 1.80 V
—V
CCQ
(130 nm) = 1.35 V to 2.24 V
—Standby current (130 nm): 8 µA (typ.)
—Read current: 8 mA (4-word burst, typ.)
The Intel
®
Wireless Flash Memory (W18) device with flexible multi-partition dual-operation
architecture, provides high-performance Asynchronous and Synchronous Burst reads. It is an
ideal memory for low-voltage burst CPUs. Combining high read performance with flash
memory intrinsic non-volatility, the W18 device eliminates the traditional system-performance
paradigm of shadowing redundant code memory from slow nonvolatile storage to faster
execution memory. It reduces total memory requirement that increases reliability and reduces
overall system power consumption and cost. The W18 device’s flexible multi-partition
architecture allows program or erase to occur in one partition while reading from another
partition. This allows for higher data write throughput compared to single-partition architectures
and designers can choose code and data partition sizes. The dual-operation architecture allows
two processors to interleave code operations while program and erase operations take place in
the background.
Order Number: 290701, Revision: 015
07-Dec-2005
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Intel may make changes to specifications and product descriptions at any time, without notice.
Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the
presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by
estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
The Intel® Wireless Flash Memory (W18) may contain design defects or errors known as errata which may cause the product to deviate from
published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an order number and are referenced in this document, or other Intel literature may be obtained by calling
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Copyright © 2005, Intel Corporation. All Rights Reserved.
07-Dec-2005
2
Intel® Wireless Flash Memory (W18)
Order Number: 290701, Revision: 015
Datasheet
Intel® Wireless Flash Memory (W18)
Contents
1.0 Introduction
............................................................................................................................... 9
1.1
1.2
Nomenclature ....................................................................................................................... 9
Conventions .......................................................................................................................... 9
2.0 Functional Overview
............................................................................................................ 11
2.1
Memory Map and Partitioning ............................................................................................. 12
3.0 Package Information
............................................................................................................ 15
3.1
3.2
W18 - 90 nm Lithography ................................................................................................... 15
W18 - 130 nm Lithography .................................................................................................16
4.0 Ballout and Signal Descriptions
...................................................................................... 18
4.1
4.2
Signal Ballout ......................................................................................................................18
Signal Descriptions ............................................................................................................. 20
5.0 Maximum Ratings and Operating Conditions
...........................................................24
5.1
5.2
Absolute Maximum Ratings ................................................................................................ 24
Operating Conditions .......................................................................................................... 25
6.0 Electrical Specifications
..................................................................................................... 26
6.1
6.2
DC Current Characteristics .................................................................................................26
DC Voltage Characteristics.................................................................................................28
7.0 AC Characteristics
................................................................................................................ 29
7.1
7.2
7.3
7.4
7.5
AC Write Characteristics ................................................................................................... 41
Erase and Program Times .................................................................................................. 47
Reset Specifications ........................................................................................................... 48
AC I/O Test Conditions ....................................................................................................... 49
Device Capacitance ............................................................................................................ 50
8.0 Power and Reset Specifications
.....................................................................................51
8.1
8.2
8.3
8.4
Active Power ....................................................................................................................... 51
Automatic Power Savings (APS) ........................................................................................ 51
Standby Power ................................................................................................................... 51
Power-Up/Down Characteristics ......................................................................................... 51
8.4.1 System Reset and RST# ....................................................................................... 52
8.4.2 VCC, VPP, and RST# Transitions .........................................................................52
Power Supply Decoupling................................................................................................... 52
8.5
9.0 Bus Operations Overview
.................................................................................................. 53
9.1
Bus Operations ................................................................................................................... 53
9.1.1 Reads ....................................................................................................................53
9.1.2 Writes..................................................................................................................... 54
9.1.3 Output Disable ....................................................................................................... 54
9.1.4 Burst Suspend ....................................................................................................... 54
9.1.5 Standby.................................................................................................................. 55
9.1.6 Reset ..................................................................................................................... 55
Datasheet
Intel
®
Wireless Flash Memory (W18)
Order Number: 290701, Revision: 015
07-Dec-2005
3
Intel® Wireless Flash Memory (W18)
9.2
9.3
Device Commands ............................................................................................................. 55
Command Sequencing ....................................................................................................... 59
10.0 Read Operations
.................................................................................................................... 60
10.1
10.2
10.3
10.4
10.5
10.6
10.7
Asynchronous Page Read Mode ........................................................................................ 60
Synchronous Burst Read Mode.......................................................................................... 60
Read Array.......................................................................................................................... 61
Read Identifier .................................................................................................................... 61
CFI Query ........................................................................................................................... 62
Read Status Register.......................................................................................................... 62
Clear Status Register.......................................................................................................... 64
11.0 Program Operations
............................................................................................................. 65
11.1
11.2
11.3
Word Program .................................................................................................................... 65
Factory Programming ......................................................................................................... 66
Enhanced Factory Program (EFP) ..................................................................................... 67
11.3.1 EFP Requirements and Considerations ................................................................ 67
11.3.2 Setup ..................................................................................................................... 68
11.3.3 Program ................................................................................................................. 68
11.3.4 Verify...................................................................................................................... 68
11.3.5 Exit......................................................................................................................... 69
12.0 Program and Erase Operations
....................................................................................... 71
12.1
12.2
12.3
Program/Erase Suspend and Resume ............................................................................... 71
Block Erase......................................................................................................................... 73
Read-While-Write and Read-While-Erase .......................................................................... 75
13.0 Security Modes
....................................................................................................................... 77
13.1
Block Lock Operations........................................................................................................ 77
13.1.1 Lock ....................................................................................................................... 78
13.1.2 Unlock.................................................................................................................... 78
13.1.3 Lock-Down............................................................................................................. 78
13.1.4 Block Lock Status .................................................................................................. 79
13.1.5 Lock During Erase Suspend .................................................................................. 79
13.1.6 Status Register Error Checking ............................................................................. 79
13.1.7 WP# Lock-Down Control ....................................................................................... 80
Protection Register ............................................................................................................. 80
13.2.1 Reading the Protection Register............................................................................ 81
13.2.2 Programing the Protection Register....................................................................... 81
13.2.3 Locking the Protection Register............................................................................. 82
VPP Protection ................................................................................................................... 83
13.2
13.3
14.0 Set Read Configuration Register
.................................................................................... 84
14.1
14.2
14.3
14.4
14.5
14.6
14.7
Read Mode (RCR[15]) ........................................................................................................ 86
First Access Latency Count (RCR[13:11]).......................................................................... 86
14.2.1 Latency Count Settings.......................................................................................... 87
WAIT Signal Polarity (RCR[10]).......................................................................................... 88
WAIT Signal Function ......................................................................................................... 88
Data Hold (RCR[9])............................................................................................................. 89
WAIT Delay (RCR[8]) ......................................................................................................... 90
Burst Sequence (RCR[7]) ................................................................................................... 90
07-Dec-2005
4
Intel
®
Wireless Flash Memory (W18)
Order Number: 290701, Revision: 014
Datasheet
Intel® Wireless Flash Memory (W18)
14.8 Clock Edge (RCR[6]) .......................................................................................................... 91
14.9 Burst Wrap (RCR[3])........................................................................................................... 92
14.10 Burst Length (RCR[2:0]) ..................................................................................................... 92
Appendix A
Appendix B
Appendix C
Write State Machine States
............................................................................ 93
Common Flash Interface (CFI)
..................................................................... 96
Ordering Information
...................................................................................... 105
Datasheet
Intel
®
Wireless Flash Memory (W18)
Order Number: 290701, Revision: 015
07-Dec-2005
5
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