SO
T4
57
IP4220CZ6
Dual USB 2.0 integrated ESD protection
Rev. 5 — 8 July 2011
Product data sheet
1. Product profile
1.1 General description
The IP4220CZ6 is designed to protect I/O lines sensitive to capacitive load, such as
USB 2.0, ethernet, Digital Video Interface (DVI) and so on, from damage due to
ElectroStatic Discharge (ESD). It incorporates four pairs of ultra low capacitance rail-to-rail
ESD protection diodes plus a Zener diode to provide protection to signal and supply
components from ESD voltages up to
8
kV contact discharge. Protection is supply
voltage independent due to the rail-to-rail diodes being connected to the Zener diode.
The device is encapsulated in a small 6-lead SOT457 (SC-74) Surface-Mounted
Device (SMD) plastic package.
1.2 Features and benefits
Pb-free, Restriction of Hazardous Substances (RoHS) compliant and free of halogen
and antimony (Dark Green compliant)
ESD protection up to
8
kV contact discharge; IEC 61000-4-2, level 4 compliant
Four pairs of ultra low input capacitance (C
I
= 1 pF) ESD rail-to-rail protection diodes
Low voltage clamping due to integrated Zener diode
Small 6-lead TSOP6 (SOT457) SMD package
1.3 Applications
General-purpose downstream ESD protection for high-frequency analog signal ports
and high-speed serial data transmission ports in:
Cellular phone and Personal Communication System (PCS) mobile handsets
PC/notebook USB 2.0/IEEE1394 ports
DVI
Cordless telephones
Wireless data (WAN/LAN) systems
Mobile Internet Devices (MID)
Portable media Players (PMP)
High-Definition Multimedia Interface (HDMI)
NXP Semiconductors
IP4220CZ6
Dual USB 2.0 integrated ESD protection
2. Pinning information
Table 1.
Pin
1
2
3
4
5
6
Pinning
Symbol
I/O 1
GND
I/O 2
I/O 3
V
P
I/O 4
Description
ESD protection
ground
ESD protection
ESD protection
supply voltage
ESD protection
1
2
3
018aaa142
Simplified outline
6
5
4
Graphic symbol
6
5
4
1
2
3
3. Ordering information
Table 2.
Ordering information
Package
Name
IP4220CZ6
SC-74
Description
plastic surface-mounted package (TSOP6); 6 leads
Version
SOT457
Type number
4. Marking
Table 3.
IP4220CZ6
Marking codes
Marking code
20
Type number
5. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
I
V
ESD
T
stg
Parameter
input voltage
electrostatic discharge
voltage
storage temperature
IEC 61000-4-2, level 4,
contact; all pins
Conditions
Min
0
8
55
Max
5.5
+8
+125
Unit
V
kV
C
6. Recommended operating conditions
Table 5.
Symbol
T
amb
Operating conditions
Parameter
ambient temperature
Conditions
Min
40
Typ
-
Max
+85
Unit
C
IP4220CZ6
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 8 July 2011
2 of 9
NXP Semiconductors
IP4220CZ6
Dual USB 2.0 integrated ESD protection
7. Characteristics
Table 6.
Characteristics
T
amb
= 25
C; unless otherwise specified.
Symbol
Parameter
Conditions
V
I
= 0 V; f = 1 MHz;
V
P
= 3 V
V
I
= 0 V; f = 1 MHz;
V
P
= 3 V
V
I
= 3 V
I = 1 mA
[1]
Min
-
-
-
6
-
Typ
1.0
40
-
-
0.7
Max
-
-
100
9
-
Unit
pF
pF
nA
V
V
C
(I/O-GND)
input/output to
ground capacitance
C
(zd-GND)
I
RM
V
BRzd
V
F
[1]
[2]
[3]
Zener diode to
ground capacitance
reverse leakage current
Zener diode breakdown
voltage
forward voltage
[3]
[2]
[3]
Pins 1, 3, 4 and 6.
Pins 1, 3, 4 and 6 to ground.
Pin 5 to pin 2.
8. Application information
8.1 Universal serial bus 2.0 protection
The device is optimized to protect, for example, two USB 2.0 ports from ESD. Each device
can protect both USB data lines and the V
BUS
supply line. A typical application is shown in
Figure 1.
V
BUS
D+
D–
GND
IP4220CZ6
4
USB 2.0
IEEE1394
CONTROLLER
5
6
3
2
1
V
BUS
D+
D–
GND
018aaa143
Fig 1.
Typical application of IP4220CZ6
IP4220CZ6
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 8 July 2011
3 of 9
NXP Semiconductors
IP4220CZ6
Dual USB 2.0 integrated ESD protection
9. Package outline
Plastic surface-mounted package (TSOP6); 6 leads
SOT457
D
B
E
A
X
y
HE
v
M
A
6
5
4
Q
pin 1
index
A
A1
c
1
2
3
Lp
e
bp
w
M
B
detail X
0
1
scale
2 mm
DIMENSIONS (mm are the original dimensions)
UNIT
mm
A
1.1
0.9
A1
0.1
0.013
bp
0.40
0.25
c
0.26
0.10
D
3.1
2.7
E
1.7
1.3
e
0.95
HE
3.0
2.5
Lp
0.6
0.2
Q
0.33
0.23
v
0.2
w
0.2
y
0.1
OUTLINE
VERSION
SOT457
REFERENCES
IEC
JEDEC
JEITA
SC-74
EUROPEAN
PROJECTION
ISSUE DATE
05-11-07
06-03-16
Fig 2.
IP4220CZ6
Package outline SOT457 (SC-74)
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 8 July 2011
4 of 9
NXP Semiconductors
IP4220CZ6
Dual USB 2.0 integrated ESD protection
10. Soldering
3.45
1.95
0.95
3.3 2.825
0.95
0.45 0.55
(6×) (6×)
solder lands
solder resist
solder paste
occupied area
0.7
(6×)
0.8
(6×)
2.4
Dimensions in mm
sot457_fr
Fig 3.
Reflow soldering footprint SOT457 (SC-74)
5.3
1.5
(4×)
solder lands
1.475
5.05
1.475
Dimensions in mm
preferred transport
direction during soldering
1.45
(6×)
2.85
sot457_fw
0.45
(2×)
solder resist
occupied area
Fig 4.
Wave soldering footprint SOT457 (SC-74)
IP4220CZ6
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 8 July 2011
5 of 9
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