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Datasheet> All Categories > logic> logic> PI74ALVCH16270V
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PI74ALVCH16270V

Description
Bus Exchanger, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56
Categorylogic    logic   
File Size319KB，5 Pages
ManufacturerPericom Semiconductor Corporation (Diodes Incorporated)
Websitehttps://www.diodes.com/
Download Datasheet Parametric View All

PI74ALVCH16270V Overview

Bus Exchanger, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, 0.300 INCH, PLASTIC, SSOP-56

PI74ALVCH16270V Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerPericom Semiconductor Corporation (Diodes Incorporated)
Parts packaging codeSSOP
package instructionSSOP, SSOP56,.4
Contacts56
Reach Compliance Codecompliant
ECCN codeEAR99
seriesALVC/VCX/A
JESD-30 codeR-PDSO-G56
JESD-609 codee0
length18.415 mm
Logic integrated circuit typeBUS EXCHANGER
Number of digits12
Number of functions1
Number of ports3
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP56,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
power supply3.3 V
propagation delay (tpd)6.5 ns
Certification statusNot Qualified
Maximum seat height2.79 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.49 mm

PI74ALVCH16270V Preview

21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16270
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
PI74ALVCH16270
12-Bit To 24-Bit Registered Bus Exchanger
with 3-State Outputs
Product Features
•
•
•
•
•
•
•
•
PI74ALVCH16270 is designed for low voltage operation
V
CC
= 2.3V to 3.6V
Hysteresis on all inputs
Typical V
OLP
(Output Ground Bounce)
< 0.8V at V
CC
= 3.3V, T
A
= 25°C
Typical V
OHV
(Output V
OH
Undershoot)
< 2.0V at V
CC
= 3.3V, T
A
= 25°C
Bus Hold retains last active bus state during 3-STATE,
eliminating the need for external pullup resistors
Industrial operation at –40°C to +85°C
Packages available:
– 56-pin 240 mil wide plastic TSSOP (A)
– 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor’s PI74ALVCH series of logic circuits are
produced in the Company’s advanced 0.5 micron CMOS technology,
achieving industry leading speed.
The PI7ALVCH16270 is used in applications where data must
be transferred from a narrow high-speed bus to a wider lower
frequency bus.
The device provides synchronous data exchange between the two
ports. Data is stored in the internal registers on the
low-to-high transition of the clock (CLK) input when the appropriate
CLKEN inputs are low. The select (SEL) line selects 1B or 2B
data for the A outputs. For data transfer in the A-to-B direction, a
two stage pipeline is provided in the A-to1B path,with a single
storage register in the A-to-2B path. Proper control of the CLKENA
inputs allows two sequential 12-bit words to be presented
synchronously as a 24-bit on the B port. Data flow is controlled by
the active-low output enables (OEA, OEB). The control terminals
are registered to synchronize the bus direction changes with the
CLK.
To ensure the high-impedance state during power up or power
down, OE should be tied to Vcc through a pullup resistor, the
minimum value of the resistor is determined by the current-sinking
capability of the driver. Due to OE being routed through a register,
the active state of the outputs cannot be determined prior to the
arrival of the first clock pulse.
Active bus-hold circuitry is provided to hold unused or floating
data inputs at a valid logic level.
Logic Block Diagram
1
PS8171A
03/17/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16270
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
Truth Tables
(1)
Inputs
CLK
­
­
­
­
OEA
H
H
L
L
OEB
H
L
H
L
A
Z
Z
Active
Active
Outputs
1B, 2B
Z
Active
Z
Active
Product Pin Description
Pin Name
OE
CLK
SEL
CLKEN
A,1B,2B
GND
V
CC
Description
Output Enable Input (Active LOW)
Clock
Select (Active Low)
Clock Enable (Active Low)
3-State Outputs
Ground
Power
A to B Storage (OEB = L)
Product Pin Configuration
L
L
L
L
H
H
H
INPUTS
CLKENA1 CLKENA2 CLK
A
L
H
L
H
L
H
X
OUTPUTS
1B
L
(2)
H
(2)
L
(2)
H
(2)
1B0
(3)
1B0
(3)
1B0
(3)
2B
2B0
(3)
2B0
(3)
L
H
L
H
2B0
(3)
OEA
CLKEN1B
2B3
GND
2B2
2B1
VCC
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
VCC
1B1
1B2
GND
1B3
CLKEN2B
SEL
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
OEB
CLKENA2
2B4
GND
2B5
2B6
VCC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
VCC
1B6
1B5
GND
1B4
CLKENA1
CLK
H
H
L
L
L
L
H
­
­
­
­
­
­
X
56-PIN
51
A56
50
V56
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
B to A Storage (OEA = L)
Inputs
CLKEN1B
H
X
L
L
X
X
CLKEN2B CLK
X
H
X
X
L
L
X
X
­
­
­
­
SEL
H
L
H
H
L
L
1B
X
X
L
H
X
X
2B
X
X
X
X
L
H
Outputs
A
A0
( 3 )
A0
( 3 )
L
H
L
H
Notes:
1. H = High Signal Level
L
=
Low Signal Level
X = Irrelevant
Z = High Impedance
↑
= Transition, Low to High
2.
Two CLK edges are needed to propagate data.
3.
Output level before the indicated steady state
input conditions were established.
2
PS8171A
03/17/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16270
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ............................................................ –65°C to +150°C
Ambient Temperature with Power Applied .......................... –40°C to +85°C
Input Voltage Range, V
IN ....................................................
–0.5V to V
CC
+0.5V
Output Voltage Range, V
OUT .............................................
–0.5V to V
CC
+0.5V
DC Input Voltage ................................................................... –0.5V to +5.0V
DC Output Current .............................................................................. 100 mA
Power Dissipation ................................................................................... 1.0W
Note:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of
this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 3.3V ± 10%)
Parame te rs
V
CC
V
IH(3)
V
IL(3)
V
IN(3)
V
OUT(3)
D e s cription
Supply Voltage
Input HIGH Voltage
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
0
0
I
OH
= - 100
m
A, V
CC
= Min. to Max.
O utput
HIGH
Voltage
V
IH
= 1.7V, I
OH
= - 6mA, V
CC
= 2.3V
V
IH
= 1.7V, I
OH
= - 12mA, V
CC
= 2.3V
V
IH
= 2.0V, I
OH
= - 12mA, V
CC
= 2.7V
V
IH
= 2.0V, I
OH
= - 12mA, V
CC
= 3.0V
V
IH
= 2.0V, I
OH
= - 24mA, V
CC
= 3.0V
I
OL
= 100
m
A, V
IL
= Min. to Max.
V
OL
O utput
LO W
Voltage
V
IL
= 0.7V, I
OL
= 6mA, V
CC
= 2.3V
V
IL
= 0.7V, I
OL
= 12mA, V
CC
= 2.3V
V
IL
= 0.8V, I
OL
= 12mA, V
CC
= 2.7V
V
IL
= 0.8V, I
OL
= 24mA, V
CC
= 3.0V
O utput
HIGH
Current
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
- 0.2
2.0
1.7
2.2
2.4
2.0
0.2
0.4
0.7
0.4
0.55
- 12
- 12
- 24
12
12
24
mA
V
Te s t Conditions
(1)
M in.
2.3
1.7
2.0
0.7
0.8
V
CC
V
CC
Typ.
(2)
M ax.
3.6
Units
Input LO W Voltage
Input Voltage
O utput Voltage
V
OH
I
OH(3)
I
OL(3)
O utput
LO W
Current
3
PS8171A
03/17/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16270
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
Te s t Conditions
(1)
V
IN
= V
CC
or GND, V
CC
= 3.6V
V
IN
= 0.7V, V
CC
= 2.3V
45
- 45
75
- 75
±500
±10
40
750
3.5
9
mA
M in.
Typ.
(2)
M ax.
±5
Units
DC Electrical Characteristics-
Continued
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 3.3V ±10%)
Parame te rs D e s cription
I
IN
Input Current
I
IN
(
HOLD
)
Input
Hold
Current
V
IN
= 1.7V, V
CC
= 2.3V
V
IN
= 0.8V, V
CC
= 3.0V
V
IN
= 2.0V, V
CC
= 3.0V
V
IN
= 0 to 3.6V, V
CC
= 3.6V
V
OUT
= V
CC
or GND, V
CC
= 3.6V
V
CC
= 3.6V, I
OUT
= 0
m
A,
V
IN
= GND or V
CC
V
CC
= 3.0V to 3.6V
O ne Input at V
CC
- 0.6V
O ther Inputs at V
CC
or GND
V
IN
= V
CC
or GND, V
CC
= 3.3V
V
O
= V
CC
or GND, V
CC
= 3.3V
I
OZ
I
CC
DI
CC
C
I
C
O
O utput Current (3- STATE O utputs)
Supply Current
Supply Current per Input
@ TTL HIGH
Control Inputs
O utputs
pF
Notes:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 3.3V, +25°C ambient and maximum loading.
3. Unused Control Inputs must be held HIGH or LOW to prevent them from floating.
Timing Requirements over Operating Range
Parame te rs
f
CLOCK
t
W
Clock frequency
Pulse duration,
CLK HIGHor Low
A data before CLK
­
B data before CLK
­
t
SU
Setup time
CLK ENA1 or CLK ENA2
before CLK
­
CLK EN1B or CLK EN2B
before CLK
­
O E data before CLK
­
A data after CLK
­
B data after CLK
­
t
H
Hold time
CLK ENA1 or CLK ENA2
before CLK
­
CLK EN1B or CLK EN2B
before CLK
­
O E after CLK
­
D
t/
DV
(1)
Input Transition
Rise or Fall
D e s cription
V
CC
= 2.5V ± 0.2V
M in.
0
3.3
4.1
0.9
3.5
3.4
4.4
0
1.4
0
0
0
0
10
M ax.
150
V
CC
= 2.7V
M in.
0
3.3
3.8
1.2
3.2
3
3.9
0
1
0.1
0
0
0
10
M ax.
150
V
CC
= 3.3V ± 0.3V
M in.
0
3.3
3.1
0.9
2.7
2.6
3.2
0.2
1.7
0.3
0.6
0.1
0
10
ns/V
ns
M ax.
150
Units
Mhz
Notes:
1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
4
PS8171A
03/17/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16270
12-Bit To 24-Bit Registered Bus Exchanger with 3-State Outputs
Switching Characteristics over Operating Range
(1)
Parame te rs
V
CC
= 2.5V ± 0.2V
From
To
(IN PUT) (OUTPUT)
M ax.
M in.
(2)
150
F
MAX
t
PD
t
EN
t
DIS
CLK
CLK
SEL
CLK
CLK
B
A
A
A or B
A or B
2
1.7
1.9
1.6
2.6
6.5
6
6.8
7.5
7.4
V
CC
= 2.7V
M in.
(2)
150
5.8
5.4
6.4
6.8
6.5
M ax.
V
CC
= 3.3V ± 0.3V
M in.
(2)
150
1.1
1
1
1
1.1
5.1
4.7
5.5
6
5.8
ns
M ax.
(2)
Units
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
Operating Characteristics, T
A
= 25ºC
Parame te r
C
PD
Power Dissipation
Capacitance
Outputs Enabled
Outputs Disabled
Te s t Conditions
C
L
= 50pF,
f = 10 MHz
V
CC
= 2.5V ± 0.2V
V
CC
= 3.3V ± 0.3V
Typical
87
80.5
120
118
Units
pF
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5
PS8171A
03/17/98
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