12-bit, 2.7V to 5.5V rail-to-rail voltage output DACs in a
12-lead DFN package. They have built-in high performance
output buffers and are guaranteed monotonic.
These parts establish new board-density benchmarks for
16- and 14-bit DACs and advance performance standards
for output drive and load regulation in single-supply,
voltage-output DACs.
The parts use a 2-wire, I
2
C compatible serial interface. The
LTC2607/LTC2617/LTC2627 operate in both the standard
mode (clock rate of 100kHz) and the fast mode (clock rate
of 400kHz). An asynchronous DAC update pin (LDAC) is
also included.
The LTC2607/LTC2617/LTC2627 incorporate a power-on
reset circuit. During power-up, the voltage outputs rise less
than 10mV above zero scale; and after power-up, they stay
at zero scale until a valid write and update take place. The
power-on reset circuit resets the LTC2607-1/LTC2617-1/
LTC2627-1 to mid-scale. The voltage outputs stay at mid-
scale until a valid write and update takes place.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 5396245 and 6891433. Patent Pending.
n
n
n
n
n
n
n
n
n
n
n
n
n
Smallest Pin-Compatible Dual DACs:
LTC2607: 16 Bits
LTC2617: 14 Bits
LTC2627: 12 Bits
Guaranteed Monotonic Over Temperature
27 Selectable Addresses
400kHz I
2
C Interface
Wide 2.7V to 5.5V Supply Range
Low Power Operation: 260µA per DAC at 3V
Power Down to 1µA, Max
High Rail-to-Rail Output Drive (±15mA, Min)
Ultralow Crosstalk (30µV)
Double-Buffered Data Latches
Asynchronous DAC Update Pin
LTC2607/LTC2617/LTC2627: Power-On Reset to
Zero Scale
LTC2607-1/LTC2617-1/LTC2627-1: Power-On Reset
to Mid-Scale
Tiny (3mm
×
4mm) 12-Lead DFN Package
applications
n
n
n
n
Mobile Communications
Process Control and Industrial Automation
Instrumentation
Automatic Test Equipment
Block Diagram
REFLO
11
GND
10
REF
9
V
CC
8
Differential Nonlinearity
(LTC2607)
V
OUTB
7
1.0
0.8
0.6
V
CC
= 5V
V
REF
= 4.096V
12
V
OUTA
12-/14-/16-BIT DAC
12-/14-/16-BIT DAC
DAC REGISTER
DAC REGISTER
DNL (LSB)
0.4
0.2
0
–0.2
–0.4
INPUT REGISTER
INPUT REGISTER
32-BIT SHIFT REGISTER
–0.6
–0.8
–1.0
2-WIRE INTERFACE
CA0
CA1
LDAC
SCL
SDA
CA2
0
16384
32768
CODE
49152
65535
2607 BD01b
1
2
3
4
5
6
2607 BD01a
26071727fa
LTC2607/LTC2617/LTC2627
aBsolute maximum ratings
(Note 1)
pin conFiguration
TOP VIEW
CA0
CA1
LDAC
SCL
SDA
CA2
1
2
3
4
5
6
13
12 V
OUTA
11 REFLO
10 GND
9 REF
8 V
CC
7 V
OUTB
Any Pin to GND ............................................ –0.3V to 6V
Any Pin to V
CC
............................................. –6V to 0.3V
Maximum Junction Temperature .......................... 125°C
Storage Temperature Range .................. –65°C to 125°C
Lead Temperature (Soldering, 10 sec)................... 300°C
Operating Temperature Range:
LTC2607C/LTC2617C/LTC2627C
LTC2607C-1/LTC2617C-1/LTC2627C-1 .... 0°C to 70°C
LTC2607I/LTC2617I/LTC2627I
LTC2607I-1/LTC2617I-1/LTC2627I-1 ....–40°C to 85°C
DE12 PACKAGE
12-LEAD (4mm 3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB
orDer inFormation
LEAD FREE FINISH
LTC2607CDE#PBF
LTC2607IDE#PBF
LTC2607CDE-1#PBF
LTC2607IDE-1#PBF
LTC2617CDE#PBF
LTC2617IDE#PBF
LTC2617CDE-1#PBF
LTC2617IDE-1#PBF
LTC2627CDE#PBF
LTC2627IDE#PBF
LTC2627CDE-1#PBF
LTC2627IDE-1#PBF
TAPE AND REEL
LTC2607CDE#TRPBF
LTC2607IDE#TRPBF
LTC2607CDE-1#TRPBF
LTC2607IDE-1#TRPBF
LTC2617CDE#TRPBF
LTC2617IDE#TRPBF
LTC2617CDE-1#TRPBF
LTC2617IDE-1#TRPBF
LTC2627CDE#TRPBF
LTC2627IDE#TRPBF
LTC2627CDE-1#TRPBF
LTC2627IDE-1#TRPBF
PART MARKING*
2607
2607
26071
26071
2617
2617
26171
26171
2627
2627
26271
26271
PACKAGE DESCRIPTION
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
12-Lead (4mm
×
3mm) Plastic DFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
26071727fa
LTC2607/LTC2617/LTC2627
electrical characteristics
SYMBOL PARAMETER
DC Performance
Resolution
Monotonicity
DNL
INL
Integral Nonlinearity
Load Regulation
(Note 2)
(Note 2)
V
REF
= V
CC
= 5V, Mid-Scale
I
OUT
= 0mA to 15mA Sourcing
I
OUT
= 0mA to 15mA Sinking
V
REF
= V
CC
= 2.7V, Mid-Scale
I
OUT
= 0mA to 7.5mA Sourcing
I
OUT
= 0mA to 7.5mA Sinking
ZSE
V
OS
Zero-Scale Error
Offset Error
V
OS
Temperature
Coefficient
GE
Gain Error
Gain Temperature
Coefficient
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V,
V
OUT
unloaded, unless otherwise noted.
LTC2627/LTC2627-1
CONDITIONS
MIN
12
12
±0.5
±1.5
±4
±5
0.1
0.1
0.2
0.2
1
±1
±7
±0.15 ±0.7
±4
TYP
MAX
LTC2617/LTC2617-1
MIN
14
14
±1
±16
0.5
0.5
1
1
9
±9
±19
0.35
0.42
0.7
0.8
1
±1
±7
±0.15 ±0.7
±4
TYP
MAX
LTC2607/LTC2607-1
MIN
16
16
±1
±64
2
2
4
4
9
±9
TYP
MAX
UNITS
Bits
Bits
LSB
LSB
LSB/mA
LSB/mA
LSB/mA
LSB/mA
mV
mV
µV/°C
%FSR
ppm/°C
Differential Nonlinearity (Note 2)
0.02 0.125
0.03 0.125
0.04
0.05
1
±1
±7
±0.15 ±0.7
±4
0.25
0.25
9
±9
Code = 0
(Note 6)
The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V, V
OUT
unloaded, unless otherwise noted.
SYMBOL PARAMETER
PSR
R
OUT
Power Supply Rejection
DC Output Impedance
CONDITIONS
V
CC
±10%
V
REF
= V
CC
= 5V, Mid-Scale;
–15mA ≤ I
OUT
≤ 15mA
V
REF
= V
CC
= 2.7V, Mid-Scale;
–7.5mA ≤ I
OUT
≤ 7.5mA
Due to Full Scale Output Change (Note 5)
Due to Load Current Change
Due to Powering Down (Per Channel)
V
CC
= 5.5V, V
REF
= 5.5V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
V
CC
= 2.7V, V
REF
= 2.7V
Code: Zero Scale; Forcing Output to V
CC
Code: Full Scale; Forcing Output to GND
Reference Input
Input Voltage Range
Resistance
Capacitance
I
REF
Reference Current, Power Down Mode
DAC Powered Down
l
l
l
l
l
l
l
l
MIN
TYP
–80
0.032
0.035
±4
±3
±30
MAX
UNITS
dB
0.15
0.15
Ω
Ω
µV
µV/mA
µV
DC Crosstalk (Note 4)
I
SC
Short-Circuit Output Current
15
15
7.5
7.5
0
44
36
37
22
30
60
60
50
50
V
CC
mA
mA
mA
mA
V
kΩ
pF
µA
Normal Mode
l
64
30
0.001
80
1
26071727fa
LTC2607/LTC2617/LTC2627
electrical characteristics
SYMBOL PARAMETER
Power Supply
V
CC
I
CC
Positive Supply Voltage
Supply Current
For Specified Performance
V
CC
= 5V (Note 3)
V
CC
= 3V (Note 3)
DAC Powered Down (Note 3) V
CC
= 5V
DAC Powered Down (Note 3) V
CC
= 3V
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V,
V
OUT
unloaded, unless otherwise noted.
CONDITIONS
MIN
2.7
0.66
0.52
0.4
0.10
TYP
MAX
5.5
1.3
1
1
1
0.3V
CC
0.7V
CC
0.8
0.6
2.4
2.0
0.15V
CC
0.85V
CC
10
10
2
0
0.4
250
50
1
10
400
10
UNITS
V
mA
mA
µA
µA
V
V
V
V
V
V
V
V
kΩ
kΩ
MΩ
V
ns
ns
µA
pF
pF
pF
Digital I/O (Note 11)
V
IL
V
IH
Low Level Input Voltage (SDA and SCL)
High Level Input Voltage (SDA and SCL)
V
CC
= 4.5V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 5.5V
V
CC
= 2.7V to 3.6V
See Test Circuit 1
See Test Circuit 1
See Test Circuit 2
See Test Circuit 2
See Test Circuit 2
Sink Current = 3mA
V
O
= V
IH(MIN)
to V
O
= V
IL(MAX)
,
C
B
= 10pF to 400pF (Note 9)
0.1V
CC
≤ V
IN
≤ 0.9V
CC
Note 12
l
l
l
l
l
l
l
l
l
l
l
l
V
IL(LDAC)
Low Level Input Voltage (LDAC)
V
IH(LDAC)
High Level Input Voltage (LDAC)
V
IL(CAn)
V
IH(CAn)
R
INH
R
INL
R
INF
V
OL
t
OF
t
SP
I
IN
C
IN
C
B
C
CAX
Low Level Input Voltage on CAn
(n = 0, 1, 2)
High Level Input Voltage on CAn (n = 0, 1, 2)
Resistance from CAn (n = 0, 1, 2)
to V
CC
to Set CAn = V
CC
Resistance from CAn (n = 0, 1, 2)
to GND to Set CAn = GND
Resistance from CAn (n = 0, 1, 2)
to V
CC
or GND to Set CAn = Float
Low Level Output Voltage
Output Fall Time
Pulse Width of Spikes Suppressed by Input Filter
Input Leakage
I/O Pin Capacitance
Capacitive Load for Each Bus Line
External Capacitive Load on Address
Pins CAn (n = 0, 1, 2)
l
20 + 0.1C
B
l
l
l
l
l
0
26071727fa
LTC2607/LTC2617/LTC2627
electrical characteristics
SYMBOL PARAMETER
AC Performance
t
S
Settling Time (Note 7)
±0.024% (±1LSB at 12 Bits)
±0.006% (±1LSB at 14 Bits)
±0.0015% (±1LSB at 16 Bits)
±0.024% (±1LSB at 12 Bits)
±0.006% (±1LSB at 14 Bits)
±0.0015% (±1LSB at 16 Bits)
7
7
9
2.7
4.8
0.8
1000
12
180
120
100
15
7
9
10
2.7
4.8
5.2
0.8
1000
12
180
120
100
15
µs
µs
µs
µs
µs
µs
V/µs
pF
nV • s
kHz
nV/√Hz
nV/√Hz
µV
P-P
CONDITIONS
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. REF = 4.096V (V
CC
= 5V), REF = 2.048V (V
CC
= 2.7V), REFLO = 0V,
V
OUT
unloaded, unless otherwise noted.
LTC2627/LTC2627-1
MIN
TYP
MAX
LTC2617/LTC2617-1
MIN
TYP
MAX
LTC2607/LTC2607-1
MIN
TYP
MAX
UNITS
Settling Time for 1LSB Step
(Note 8)
Voltage Output Slew Rate
Capacitive Load Driving
Glitch Impulse
Multiplying Bandwidth
e
n
Output Voltage Noise Density
Output Voltage Noise
2.7
0.8
1000
At Mid-Scale Transition
At f = 1kHz
At f = 10kHz
0.1Hz to 10Hz
12
180
120
100
15
timing characteristics
SYMBOL PARAMETER
V
CC
= 2.7V to 5.5V
f
SCL
t
HD(STA)
t
LOW
t
HIGH
t
SU(STA)
t
HD(DAT)
t
SU(DAT)
t
r
t
f
t
SU(STO)
t
BUF
t
1
t
2
SCL Clock Frequency
Hold Time (Repeated) Start Condition
Low Period of the SCL Clock Pin
High Period of the SCL Clock Pin
Set-Up Time for a Repeated Start Condition
Data Hold Time
Data Set-Up Time
Rise Time of Both SDA and SCL Signals
Fall Time of Both SDA and SCL Signals
Set-Up Time for Stop Condition
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (See Figure 1) (Notes 10, 11)
CONDITIONS
l
l
l
l
l
l
l
MIN
0
0.6
1.3
0.6
0.6
0
100
TYP
MAX
400
UNITS
kHz
µs
µs
µs
µs
0.9
300
300
µs
ns
ns
ns
µs
µs
ns
ns
(Note 9)
(Note 9)
l
20 + 0.1C
B
l
20 + 0.1C
B
l
l
l
l
0.6
1.3
400
20
Bus Free Time Between a Stop and Start Condition
Falling Edge of 9th Clock of the 3rd Input Byte to
LDAC
High or Low Transition
LDAC
Low Pulse Width
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
Linearity and monotonicity are defined from code k
L
to code
2N – 1, where N is the resolution and k
L
is given by k
L
= 0.016(2
N
/V
REF
),
rounded to the nearest whole code. For V
REF
= 4.096V and N = 16, k
L
=
256 and linearity is defined from code 256 to code 65,535.
Note 3:
SDA, SCL and
LDAC
at 0V or V
CC
, CA0, CA1 and CA2 Floating.
Note 4:
DC crosstalk is measured with V
CC
= 5V and V
REF
= 4.096V, with
the measured DAC at mid-scale, unless otherwise noted.
Note 5:
R
L
= 2kΩ to GND or V
CC
.
Note 6:
Inferred from measurement at code k
L
(Note 2) and at full scale.
Note 7:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped 1/4 scale to 3/4 scale
and 3/4 scale to 1/4 scale. Load is 2k in parallel with 200pF to GND.
Note 8:
V
CC
= 5V, V
REF
= 4.096V. DAC is stepped ±1LSB between half
scale and half scale – 1. Load is 2k in parallel with 200pF to GND.
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