IDT70V05L25G datasheet, PDF - EEWORLD Datasheet

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IDT70V05L25G: DescriptionDual-Port SRAM, 8KX8, 25ns, CMOS, CPGA68, 1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68; Categorystorage storage; File Size237KB，17 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT70V05L25G Overview

Dual-Port SRAM, 8KX8, 25ns, CMOS, CPGA68, 1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68

IDT70V05L25G Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	PGA
package instruction	1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68
Contacts	68
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	25 ns
Other features	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN
I/O type	COMMON
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
length	29.464 mm
memory density	65536 bit
Memory IC Type	DUAL-PORT SRAM
memory width	8
Number of functions	1
Number of ports	2
Number of terminals	68
word count	8192 words
character code	8000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	8KX8
Output characteristics	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
power supply	3.3 V
Certification status	Not Qualified
Maximum seat height	5.207 mm
Maximum standby current	0.0025 A
Minimum standby current	3 V
Maximum slew rate	0.165 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	30
width	29.464 mm

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HIGH-SPEED 3.3V

8K x 8 DUAL-PORT

STATIC RAM

Integrated Device Technology, Inc.

IDT70V05S/L

FEATURES:

• True Dual-Ported memory cells which allow simulta-

neous access of the same memory location

• High-speed access

— Commercial: 25/35/55ns (max.)

• Low-power operation

— IDT70V05S

Active: 350mW (typ.)

Standby: 3.5mW (typ.)

— IDT70V05L

Active: 350mW (typ.)

Standby: 1mW (typ.)

• IDT70V05 easily expands data bus width to 16 bits or

more using the Master/Slave select when cascading

more than one device

• M/

= H for

BUSY

output flag on Master

= L for

BUSY

input on Slave

• Busy and Interrupt Flags

• On-chip port arbitration logic

• Full on-chip hardware support of semaphore signaling

between ports

• Fully asynchronous operation from either port

• Devices are capable of withstanding greater than 2001V

electrostatic discharge

• Battery backup operation—2V data retention

• LVTTL-compatible, single 3.3V (±0.3V) power supply

• Available in 68-pin PGA, 68-pin PLCC, and a 64-pin

TQFP

DESCRIPTION:

The IDT70V05 is a high-speed 8K x 8 Dual-Port Static

RAM. The IDT70V05 is designed to be used as a stand-alone

Dual-Port RAM or as a combination MASTER/SLAVE Dual-

Port RAM for 16-bit-or-more word systems. Using the IDT

MASTER/SLAVE Dual-Port RAM approach in 16-bit or wider

memory system applications results in full-speed, error-free

FUNCTIONAL BLOCK DIAGRAM

I/O

- I/O

I/O

Control

I/O

Control

I/O

-I/O

BUSY

(1,2)

BUSY

Address

Decoder

(1,2)

12L

MEMORY

ARRAY

Address

Decoder

12R

NOTES:

1. (MASTER):

BUSY

is output;

(SLAVE):

BUSY

is input.

2. BUSY outputs

and INT outputs

are non-tri-

stated push-pull.

ARBITRATION

INTERRUPT

SEMAPHORE

LOGIC

SEM

(2)

SEM

INT

(2)

INT

2941 drw 01

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE

For latest information contact IDT’s web site at www.idt.com or fax-on-demand at 408-492-8391.

OCTOBER 1996

6.35

DSC-2941/3

IDT70V05L25G Related Products

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Description	Dual-Port SRAM, 8KX8, 25ns, CMOS, CPGA68, 1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	Dual-Port SRAM, 8KX8, 25ns, CMOS, CPGA68, 1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	Dual-Port SRAM, 8KX8, 55ns, CMOS, PQFP64, 14 X 14 MM, 1.40 MM HEIGHT, TQFP-64	Dual-Port SRAM, 8KX8, 35ns, CMOS, PQFP64, 14 X 14 MM, 1.40 MM HEIGHT, TQFP-64	Dual-Port SRAM, 8KX8, 55ns, CMOS, CPGA68, 1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	Dual-Port SRAM, 8KX8, 55ns, CMOS, CPGA68, 1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	Dual-Port SRAM, 8KX8, 35ns, CMOS, PQCC68, 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68	Dual-Port SRAM, 8KX8, 35ns, CMOS, PQCC68, 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68	Dual-Port SRAM, 8KX8, 55ns, CMOS, PQCC68, 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68
Is it lead-free?	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	PGA	PGA	QFP	QFP	PGA	PGA	LCC	LCC	LCC
package instruction	1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	14 X 14 MM, 1.40 MM HEIGHT, TQFP-64	14 X 14 MM, 1.40 MM HEIGHT, TQFP-64	1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	1.180 X 1.180 INCH, 0.160 INCH HEIGHT, CERAMIC, PGA-68	0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68	0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68	0.950 X 0.950 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-68
Contacts	68	68	64	64	68	68	68	68	68
Reach Compliance Code	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant	not_compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
Maximum access time	25 ns	25 ns	55 ns	35 ns	55 ns	55 ns	35 ns	35 ns	55 ns
Other features	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN	INTERRUPT FLAG; SEMAPHORE; AUTOMATIC POWER-DOWN
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 code	S-CPGA-P68	S-CPGA-P68	S-PQFP-G64	S-PQFP-G64	S-CPGA-P68	S-CPGA-P68	S-PQCC-J68	S-PQCC-J68	S-PQCC-J68
JESD-609 code	e0	e0	e0	e0	e0	e0	e0	e0	e0
length	29.464 mm	29.464 mm	14 mm	14 mm	29.464 mm	29.464 mm	24.2062 mm	24.2062 mm	24.2062 mm
memory density	65536 bit	65536 bit	65536 bit	65536 bit	65536 bit	65536 bit	65536 bit	65536 bit	65536 bit
Memory IC Type	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM	DUAL-PORT SRAM
memory width	8	8	8	8	8	8	8	8	8
Number of functions	1	1	1	1	1	1	1	1	1
Number of ports	2	2	2	2	2	2	2	2	2
Number of terminals	68	68	64	64	68	68	68	68	68
word count	8192 words	8192 words	8192 words	8192 words	8192 words	8192 words	8192 words	8192 words	8192 words
character code	8000	8000	8000	8000	8000	8000	8000	8000	8000
Operating mode	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
organize	8KX8	8KX8	8KX8	8KX8	8KX8	8KX8	8KX8	8KX8	8KX8
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	PGA	PGA	LQFP	LQFP	PGA	PGA	QCCJ	QCCJ	QCCJ
Encapsulate equivalent code	PGA68,11X11	PGA68,11X11	QFP64,.66SQ,32	QFP64,.66SQ,32	PGA68,11X11	PGA68,11X11	LDCC68,1.0SQ	LDCC68,1.0SQ	LDCC68,1.0SQ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	FLATPACK, LOW PROFILE	FLATPACK, LOW PROFILE	GRID ARRAY	GRID ARRAY	CHIP CARRIER	CHIP CARRIER	CHIP CARRIER
Parallel/Serial	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
Peak Reflow Temperature (Celsius)	225	225	240	240	225	225	225	225	225
power supply	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.207 mm	5.207 mm	1.6 mm	1.6 mm	5.207 mm	5.207 mm	4.572 mm	4.572 mm	4.572 mm
Maximum standby current	0.0025 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A	0.005 A
Minimum standby current	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Maximum slew rate	0.165 mA	0.19 mA	0.155 mA	0.155 mA	0.18 mA	0.155 mA	0.18 mA	0.155 mA	0.155 mA
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	NO	YES	YES	NO	NO	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)	Tin/Lead (Sn85Pb15)
Terminal form	PIN/PEG	PIN/PEG	GULL WING	GULL WING	PIN/PEG	PIN/PEG	J BEND	J BEND	J BEND
Terminal pitch	2.54 mm	2.54 mm	0.8 mm	0.8 mm	2.54 mm	2.54 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	QUAD	QUAD	PERPENDICULAR	PERPENDICULAR	QUAD	QUAD	QUAD
Maximum time at peak reflow temperature	30	30	20	20	30	30	30	30	30
width	29.464 mm	29.464 mm	14 mm	14 mm	29.464 mm	29.464 mm	24.2062 mm	24.2062 mm	24.2062 mm
Maker	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)
Base Number Matches	-	1	1	1	1	1	1	1	-
Humidity sensitivity level	-	-	3	3	-	-	1	1	1

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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