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K4F640411D-JC60T

Description
Fast Page DRAM, 16MX4, 60ns, CMOS, PDSO32
Categorystorage    storage   
File Size367KB,20 Pages
ManufacturerSAMSUNG
Websitehttp://www.samsung.com/Products/Semiconductor/
Download Datasheet Parametric View All

K4F640411D-JC60T Overview

Fast Page DRAM, 16MX4, 60ns, CMOS, PDSO32

K4F640411D-JC60T Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSAMSUNG
package instructionSOJ, SOJ32,.44
Reach Compliance Codeunknown
Maximum access time60 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J32
JESD-609 codee0
memory density67108864 bit
Memory IC TypeFAST PAGE DRAM
memory width4
Number of terminals32
word count16777216 words
character code16000000
Maximum operating temperature70 °C
Minimum operating temperature
organize16MX4
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ32,.44
Package shapeRECTANGULAR
Package formSMALL OUTLINE
power supply5 V
Certification statusNot Qualified
refresh cycle4096
self refreshNO
Maximum standby current0.001 A
Maximum slew rate0.11 mA
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
K4F660411D, K4F640411D
CMOS DRAM
16M x 4bit CMOS Dynamic RAM with Fast Page Mode
DESCRIPTION
This is a family of 16,777,216 x 4 bit Fast Page Mode CMOS DRAMs. Fast Page Mode offers high speed random access of memory
cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time(-50 or -60), package type(SOJ or TSOP-II) are optional fea-
tures of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. This 16Mx4 Fast
Page Mode DRAM family is fabricated using Samsung′s advanced CMOS process to realize high band-width, low power consumption
and high reliability.
FEATURES
• Part Identification
- K4F660411D-JC(5.0V, 8K Ref.)
- K4F640411D-JC(5.0V, 4K Ref.)
- K4F660411D-TC(5.0V, 8K Ref.)
- K4F640411D-TC(5.0V, 4K Ref.)
• Fast Page Mode operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Fast parallel test mode capability
• TTL(5.0V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
Active Power Dissipation
Unit : mW
Speed
-50
-60
8K
495
440
4K
660
605
• Available in Plastic SOJ and TSOP(II) packages
• +5.0V±10% power supply
Refresh Cycles
Part
NO.
K4F660411D*
K4F640411D
Refresh
cycle
8K
4K
Refresh time
Normal
64ms
RAS
CAS
W
Control
Clocks
Vcc
Vss
FUNCTIONAL BLOCK DIAGRAM
VBB Generator
Refresh Control
Refresh Counter
Memory Array
16,777,216 x 4
Cells
Sense Amps & I/O
* Access mode & RAS only refresh mode
: 8K cycle/64ms
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
Performance Range
Speed
-50
-60
Refresh Timer
Row Decoder
Data in
Buffer
DQ0
to
DQ3
Data out
Buffer
OE
t
RAC
50ns
60ns
t
CAC
13ns
15ns
t
RC
90ns
110ns
t
PC
35ns
40ns
A0~A12
(A0~A11)*1
A0~A10
(A0~A11)*1
Row Address Buffer
Col. Address Buffer
Column Decoder
Note) *1 : 4K Refresh
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
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