IDT72V3622L15PF9 datasheet, PDF

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IDT72V3622L15PF9: DescriptionFIFO, 256X36, 10ns, Synchronous, CMOS, PQFP120, TQFP-120; Categorystorage storage; File Size260KB，29 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT72V3622L15PF9 Overview

FIFO, 256X36, 10ns, Synchronous, CMOS, PQFP120, TQFP-120

IDT72V3622L15PF9 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	TQFP-120
Contacts	120
Reach Compliance Code	not_compliant
ECCN code	EAR99
Maximum access time	10 ns
Other features	MAIL BOX BYPASS REGISTER
period time	15 ns
JESD-30 code	S-PQFP-G120
JESD-609 code	e0
length	14 mm
memory density	9216 bit
memory width	36
Humidity sensitivity level	4
Number of functions	1
Number of terminals	120
word count	256 words
character code	256
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256X36
Exportable	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LFQFP
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	0.4 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	20
width	14 mm

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3.3 VOLT CMOS SyncBiFIFO

256 x 36 x 2

512 x 36 x 2

1,024 x 36 x 2

IDT72V3622

IDT72V3632

IDT72V3642

FEATURES:

•

Memory storage capacity:

IDT72V3622 – 256 x 36 x 2

IDT72V3632 – 512 x 36 x 2

IDT72V3642 – 1,024 x 36 x 2

Supports clock frequencies up to 100 MHz

Fast access times of 6.5ns

Free-running CLKA and CLKB may be asynchronous or coincident

(simultaneous reading and writing of data on a single clock edge

is permitted)

Two independent clocked FIFOs buffering data in opposite direc-

tions

Mailbox bypass register for each FIFO

Programmable Almost-Full and Almost-Empty flags

Microprocessor Interface Control Logic

FFA/IRA, EFA/ORA, AEA,

and

AFA

flags synchronized by CLKA

FFB/IRB, EFB/ORB, AEB,

and

AFB

flags synchronized by CLKB

•

Select IDT Standard timing (using

EFA, EFB, FFA

and

FFB

flags

functions) or First Word Fall Through timing (using ORA, ORB, IRA

and IRB flag functions)

Available in 132-pin Plastic Quad Flatpack (PQFP) or space-saving

120-pin Thin Quad Flatpack (TQFP)

Functionally compatible to the 5V operating IDT723622/723632/

723642

Industrial temperature range (–40

C to +85

C) is available

DESCRIPTION:

The IDT72V3622/72V3632/72V3642 are functionally compatible versions

of the IDT723622/723632/723642, designed to run off a 3.3V supply for

exceptionally low-power consumption. These devices are monolithic, high-

speed, low-power, CMOS Bidirectional SyncFIFO (clocked) memories which

support clock frequencies up to 100MHz and have read access times as fast

as 6.5ns. Two independent 256/512/1,024 x 36 dual-port SRAM FIFOs on

board each chip buffer data in opposite directions. Communication between

FUNCTIONAL BLOCK DIAGRAM

MBF1

CLKA

CSA

W/RA

ENA

MBA

Mail 1

Input

RAM

ARRAY

256 x 36

512 x 36

1,024 x 36

Output

Port-A

Control

Logic

RST1

FIFO1,

Mail1

Reset

Logic

Write

Pointer

Read

Pointer

EFB/ORB

AEB

FFA/IRA

AFA

FIFO 1

Status Flag

Logic

- A

Programmable Flag

Offset Registers

FIFO 2

Timing

Mode

FWFT

- B

EFA/ORA

AEA

Status Flag

Logic

Write

Pointer

FFB/IRB

AFB

Read

Pointer

RAM

ARRAY

256 x 36

512 x 36

1,024 x 36

Mail 2

Output

FIFO2,

Mail2

Reset

Logic

Input

RST2

Port-B

Control

Logic

CLKB

CSB

W/RB

ENB

MBB

4660 drw 01

MBF2

IDT and the IDT logo are trademark of Integrated Device Technology, Inc SyncBiFIFO is a trademark of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE



DECEMBER 2001

DSC-4660/5

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