EEWORLDEEWORLDEEWORLD

Part Number

Search

IBM0436A8ACLAA-4F

Description
Standard SRAM, 256KX36, 4.3ns, CMOS, PBGA119, BGA-119
Categorystorage    storage   
File Size358KB,26 Pages
ManufacturerIBM
Websitehttp://www.ibm.com
Download Datasheet Parametric View All

IBM0436A8ACLAA-4F Overview

Standard SRAM, 256KX36, 4.3ns, CMOS, PBGA119, BGA-119

IBM0436A8ACLAA-4F Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIBM
Parts packaging codeBGA
package instructionBGA, BGA119,7X17,50
Contacts119
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time4.3 ns
Other featuresLATCHED OUTPUTS
I/O typeCOMMON
JESD-30 codeR-PBGA-B119
JESD-609 codee0
length22 mm
memory density9437184 bit
Memory IC TypeSTANDARD SRAM
memory width36
Number of functions1
Number of terminals119
word count262144 words
character code256000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature
organize256KX36
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Encapsulate equivalent codeBGA119,7X17,50
Package shapeRECTANGULAR
Package formGRID ARRAY
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply1.9,3.3 V
Certification statusNot Qualified
Maximum seat height2.679 mm
Maximum standby current0.065 A
Minimum standby current3.14 V
Maximum slew rate0.4 mA
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch1.27 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width14 mm
.
IBM0418A4ACLAA
IBM0436A8ACLAA
IBM0418A8ACLAA
IBM0436A4ACLAA
8Mb (256Kx36 & 512Kx18) and 4Mb (128Kx36 & 256Kx18) SRAM
Features
• 8Mb: 256K x 36 or 512K x 18 organizations
4Mb: 128K x 36 or 256K x 18 organizations
• 0.25 Micron CMOS technology
• Synchronous Register-Latch Mode of Operation
with Self-Timed Late Write
• Single Differential HSTL Clock
• +3.3V Power Supply, Ground, 2.0 Volt max
V
DDQ,
and 0.85 Volt V
REF
• HSTL Input and Output levels
• Registered Addresses, Write Enables, Synchro-
nous Select, and Data Ins
• Latched Outputs
• Common I/O
• Asynchronous Output Enable and Power Down
Inputs
• Boundary Scan using limited set of JTAG
1149.1 functions
• Byte Write Capability & Global Write Enable
• 7 x 17 Bump Ball Grid Array Package with
SRAM JEDEC Standard Pinout and Boundary
SCAN Order
• Programmable Impedance Output Drivers
Description
The 4Mb and 8Mb SRAM
S
—IBM0436A4ACLAA,
IBM0436A8ACLAA, IBM0418A4ACLAA, and
IBM0418A8ACLAA—are Synchronous Register-
Latch Mode, high-performance CMOS Static Ran-
dom Access Memories that are versatile, have wide
I/O, and can achieve 4.2 ns cycle times. Differential
K clocks are used to initiate the read/write operation
and all internal operations are self-timed. At the ris-
ing edge of the K clock, all Addresses, Write-
Enables, Sync Select, and Data Ins are registered
internally. Data Outs are updated from output regis-
ters off the falling edge of the K clock. An internal
Write buffer allows write data to follow one cycle
after addresses and controls. The device is oper-
ated with a single +3.3V power supply and is com-
patible with HSTL I/O interfaces.
trlh3320.04
01/01
©IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 1 of 26
About Zigbee many-to-one serial port transparent transmission problem
I am a sophomore now, and I need to use zigbee in my project. The function I need now is the one-to-many serial port transparent transmission function of zigbee. I modified the one-to-one routine in t...
进击的学霸 TI Technology Forum
TLV5616 has no output voltage
oid TLV5616I_SPI_SendByte(u16 vol) {u8 i = 0,j=0;TLV5616I_SCK_High();TLV5616I_FS_High();TLV5616I_CS_High();for(j = 10; j0 ; j--);TLV5616I_CS_Low();for(j = 10; j0 ; j--);TLV5616I_FS_Low();for(i = 0;i16...
山川赋 stm32/stm8
I will go home tomorrow, Ooo, Ooo, Ooo... I will share my blessings with you.
[b]First, a very cliché opening remark (O(∩_∩)O hahahaha~)[/b]: 2009 was an extraordinary year. . . . . . I had a lot of fun in EEworld in the first half of the year, was extremely busy in the second ...
fuhuait Embedded System
An error message "Nodebug designs are not supported." appears during Modelsim simulation loading
RT. The complete information is as follows: # ** Fatal: Attempting to load -nodebug design unit. # Nodebug designs are not supported. # # Time: 0 ps Iteration: 0 Instance: /ddr3_example_sim File: ./.....
robertslyh FPGA/CPLD
What is the DMD lens action mechanism of the projector?
The introduction I looked up on Baidu didn't provide a detailed explanation of the principle, what the shaft and yoke look like, what materials and structures they are made of, what the moving parts a...
北方的落叶 Motor Drive Control(Motor Control)
What is word length? What do the commonly referred to 32-bit and 64-bit machines mean?
What is word length? What do the commonly referred to 32-bit and 64-bit machines mean?...
8444574 Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1463  2433  1148  1675  1951  30  49  24  34  40 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号