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PALCE16V8H-10JC/5

Description
EE PLD, 10ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20
CategoryProgrammable logic devices    Programmable logic   
File Size2MB,27 Pages
ManufacturerAMD
Websitehttp://www.amd.com
Download Datasheet Parametric View All

PALCE16V8H-10JC/5 Overview

EE PLD, 10ns, PAL-Type, CMOS, PQCC20, PLASTIC, LCC-20

PALCE16V8H-10JC/5 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAMD
Parts packaging codeQLCC
package instructionQCCJ, LDCC20,.4SQ
Contacts20
Reach Compliance Codeunknown
Other featuresPROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; POWER-UP RESET
ArchitecturePAL-TYPE
maximum clock frequency66.7 MHz
JESD-30 codeS-PQCC-J20
JESD-609 codee0
length8.9662 mm
Dedicated input times8
Number of I/O lines8
Number of entries18
Output times8
Number of product terms64
Number of terminals20
Maximum operating temperature75 °C
Minimum operating temperature
organize8 DEDICATED INPUTS, 8 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC20,.4SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeEE PLD
propagation delay10 ns
Certification statusNot Qualified
Maximum seat height4.57 mm
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL EXTENDED
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width8.9662 mm

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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