T6963C-0201 datasheet, PDF - EEWORLD Datasheet

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T6963C-0201: DescriptionIC 32 X 80 DOTS DOT MAT LCD DSPL CTLR, PQFP67, 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-67, Display Controller; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，48 Pages; ManufacturerToshiba Semiconductor; Websitehttp://toshiba-semicon-storage.com/

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T6963C-0201 Overview

IC 32 X 80 DOTS DOT MAT LCD DSPL CTLR, PQFP67, 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-67, Display Controller

T6963C-0201 Parametric

Parameter Name	Attribute value
Maker	Toshiba Semiconductor
Parts packaging code	QFP
package instruction	QFP,
Contacts	67
Reach Compliance Code	unknown
Address bus width	1
Bus compatibility	TMPZ84C00P
maximum clock frequency	5.5 MHz
show configuration	32 X 80 DOTS
External data bus width	8
JESD-30 code	R-PQFP-G67
length	20 mm
Number of terminals	67
Maximum operating temperature	75 °C
Minimum operating temperature	-20 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QFP
Package shape	RECTANGULAR
Package form	FLATPACK
Certification status	Not Qualified
Maximum seat height	2.5 mm
Maximum slew rate	6 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL EXTENDED
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
width	14 mm
uPs/uCs/peripheral integrated circuit type	DISPLAY CONTROLLER, DOT MATRIX LCD DISPLAY

T6963C-0201 Preview

T6963C

TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC

T6963C

DOT MATRIX LCD CONTROLLER LSI

The T6963C is an LCD controller designed to be used with LCD

control driver LSIs and data display memories. The device has an

8−bit parallel data bus and control lines for reading or writing

through an MPU interface. It can be directly connected to a

TMPZ−80.

It has a

128−word

character generator ROM which can control an

external display RAM of up to 64 Kbytes. Allocation of text,

graphics and external character generator RAM can be made

easily and the display window can be moved freely within the

allocated memory range.

The device supports a very broad range of LCD formats by

allowing selection of different combinations via a set of

programmable inputs. It can be used in text, graphic and

combination text−and−graphic modes, and includes various

attribute functions.

Weight: 1.2 g (typ.)

Features

Display format (pin−selectable)

Columns

: 32, 40, 64, 80

Lines

: 2, 4, 6, 8,

10, 12, 14, 16,

20, 24, 28, 32

The combination of number of columns and number of lines must not cause the frequency to exceed 5.5 MHz.

(See Fig. 2)

Character font (pinselectable)

Horizontal dots

: 5, 6, 7, 8

Vertical dots

: 8 (fixed)

It is necessary to set a character font in Graphic mode just as in Text mode. The oscillation frequency does not

change with the font selection.

Display duty

128

128−word

character generator ROM (code 0101) T6963C−0101 is built in as standard.

External display memory : 64 KB Max

The addresses in display memory of the text area, graphic area and external character generator area are

determined by software.

Read or Write operations from the CPU do not disturb the display.

A crystal oscillator circuit is built in. The oscillation frequency is adjusted according to the display size. If using

an external clock, use the XI pin as the clock input. (XO open.)

External capacitors Crystal oscillation : 20 to 30 pF

Ceramic oscillation : 30 to

100

Built−in feedback resistor

: 900 kΩ (typ.)

Toshiba LCD driver LSIs (other than these with a built−in RAM) can be connected to the device.

External display RAM must be static RAM. The T6963C cannot refresh D−RAM.

The attribute functions can only be used in Text mode. They cannot be used in Graphic or Combination

Character mode.

2002-01-07

T6963C

Block Diagram

2002-01-07

T6963C

Pin Assignment

Pin Functions

Pin Name

I/O

Pins for selection of LCD size

DUAL

Functions

MDS

MD0

MD1

Input

MD1

MD0

LINES

V−DOTS

112 128

128 160 192 224 256

2 SCREENS

1 SCREEN

MD2

MD3

Input

Pins for selection of number of columns

MD3

Columns

FS0

FS1

Input

Pins for selection of font

FS1

Font

D0 to D7

5×8 6×8 7×8 8×8

I/O

Input

Data I / O pins between CPU and T6963C (D7 is MSB)

Data Write. Write data into T6963C when

= L.

Data Read. Read data fromT6963C when

= L.

Chip Enable for T6963C.

must be L when CPU communicates with T6963C.

2002-01-07

T6963C

Pin Name

C/D

HALT

RESET

I/O

Input

= L ······ C / D = H: Command Write

= L ······ C / D = H: Status Read

Functions

C / D = L: Data Write

C / D = L: Data Read

H ······ Normal, L ······ Stops the oscillation of the clock

H ······ Normal (T6963C has internal pull−up resistor)

L ······ Initialize T6963C. Text and graphic have addresses and text and graphic area settings are

retained.

Control pin for external DC / DC. DSPON is L when

HALT

is L or

RESET

is L.

(When DSPON goes H, the column drivers are cleared.)

H ······ Single−Scan

L ······ Dual−Scan

H ······ Sending data by odd / even separation

L ······ Sending data by simple serial method

DUAL

SDSEL

DSPON

Output

DUAL

Input

SDSEL

Input

Upper screen

Lower screen

HOD, ED

―

HOD, ED

LOD, ED

ce0

(LOD)

ce1

(LSCP)

Output

ce0

DUAL

= H Chip enable pin for display memory in the address range 0000H to 07FFH

LOD at

DUAL

= L Serial data output for odd columns in lower area of LCD

ce1

Output

I/O

Output

Input

Output

Input

―

DUAL

= H Chip enable pin for display memory in the address range 0800H to 0FFFH

LSCP at

DUAL

= L Shift clock pulse output for column drivers in lower area of LCD

Chip enable pin for display memory of any address

Data I / O pins for display memory

Address outputs for display memory

(ad15 = L: for upper area of LCD, ad15 = H: for lower area of LCD)

Read / Write signal for display memory

SDSEL

= H: Data output for even columns in both upper and lower areas of LCD

SDSEL

= L: Data output for columns in both upper and lower areas of LCD

d0 to d7

ad0 to ad15

R/W

HOD

CDATA

HSCP

CH1, CH2

Data output for odd columns in upper area of LCD

Synchronous signal for row driver

Shift clock pulse for column driver of upper area of LCD

Latch pulse for column driver. Shift clock pulse for row driver

Frame signal

Crystal oscillator input

Crystal oscillator output

Check signal

Test input. Usually open

Power supply (5.0 V)

Power supply (0 V)

2002-01-07

T6963C

Functional Definition

●

After power on, it is necessary to reset. RESET is kept L between 5 clocks up (oscillation clock).

●

When HALT

L, the oscillation stops. The power supply for the LCD must now be turned off, to protect

the LCD from DC bias.

●

The HALT function includes the RESET function.

●

The column / line counter and display register are cleared by RESET. (Other registers are not cleared.)

Disable the display using the clear−display register.

●

The status must be checked before data or commands are sent. The MSB

0 status check must be done in

particular. There is a possibility of erroneous operation due to a hard interrupt.

●

STA0 and STA1 must be checked at the same time. When a command is executed, data transmission errors

may occur.

●

The T6963C can only handle one byte per machine cycle (16 clocks). It is impossible to send more than two

data in a machine cycle.

●

When using a command with operand data, it important to send the data first, and then execute the

command.

●

The character codes used by the T6963C are different from ASCII codes.

2002-01-07

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