BLM7G24S-30BG
LDMOS 2-stage power MMIC
Rev. 2 — 1 July 2015
Product data sheet
1. Product profile
1.1 General description
The BLM7G24S-30BG is a 2-stage power MMIC using NXP’s state of the art Gen7
LDMOS technology. This device is perfectly suited as general purpose driver in the
frequency range from 2100 MHz to 2400 MHz. Available in gull wing.
Table 1.
Application performance
Typical RF performance at T
case
= 25
C; I
Dq1
= 75 mA; I
Dq2
= 233 mA.
Test signal: 3GPP test model 1; 64 DPCH; clipping at 46 %; PAR = 8.4 dB at 0.01% probability on
CCDF per carrier; carrier spacing = 5 MHz; unless otherwise specified in a class-AB application
circuit.
Test signal
2-carrier W-CDMA
2-carrier W-CDMA
f
(MHz)
2140
2350
V
DS
(V)
28
28
P
L(AV)
(W)
1.6
1.6
G
p
(dB)
31.5
29.3
D
(%)
11.3
10.7
ACPR
(dBc)
43
42
1.2 Features and benefits
Integrated temperature compensated bias
Biasing of individual stages is externally accessible
Integrated current sense
Integrated ESD protection
Excellent thermal stability
High power gain
On-chip matching for ease of use (input matched to 50
;
output partially matched)
Designed for broadband operation (frequency 2100 MHz to 2400 MHz)
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
RF power MMIC for W-CDMA base stations in the 2100 MHz to 2400 MHz frequency
range.
NXP Semiconductors
BLM7G24S-30BG
LDMOS 2-stage power MMIC
2. Pinning information
2.1 Pinning
Transparent top view
The exposed backside of the package is the ground terminal of the device.
Fig 1.
Pin configuration
2.2 Pin description
Table 2.
Symbol
V
DS(A1)
V
GSS(A2)
V
DSS(A2)
RF_IN_A
V
GSS(A1)
V
DSS(A1)
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
n.c.
BLM7G24S-30BG
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Description
drain-source voltage of stage A1
gate sense FET and gate source voltage of stage A2
drain sense FET source voltage of stage A2
RF input path A
gate sense FET and gate source voltage of stage A1
drain sense FET source voltage of stage A1
not connected
not connected
not connected
not connected
not connected
not connected
not connected
not connected
© NXP Semiconductors N.V. 2015. All rights reserved.
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 2 — 1 July 2015
2 of 19
NXP Semiconductors
BLM7G24S-30BG
LDMOS 2-stage power MMIC
Pin description
…continued
Pin
15
16
Description
not connected
RF output path A / drain source voltage of stage A2
Table 2.
Symbol
n.c.
RF_OUT_A/V
DS(A2)
GND
flange RF ground
3. Ordering information
Table 3.
Ordering information
Package
Name
BLM7G24S-30BG
HSOP16
Description
plastic, heatsink small outline package; 16 leads
Version
SOT1212-2
Type number
4. Block diagram
Fig 2.
Block diagram of BLM7G24S-30BG
5. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
V
GS(sense)
T
stg
T
j
T
case
[1]
Parameter
drain-source voltage
gate-source voltage
sense gate-source voltage
storage temperature
junction temperature
case temperature
Conditions
Min
-
0.5
0.5
65
[1]
Max
65
+13
+9
+150
225
150
Unit
V
V
V
C
C
C
-
-
Continuous use at maximum temperature will affect the MTTF.
BLM7G24S-30BG
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 1 July 2015
3 of 19
NXP Semiconductors
BLM7G24S-30BG
LDMOS 2-stage power MMIC
6. Thermal characteristics
Table 5.
Thermal characteristics
Measured for total device.
Symbol Parameter
R
th(j-c)
thermal resistance from
junction to case
Conditions
final stage; T
case
= 90
C;
P
L
= 1.6 W
driver stage; T
case
= 90
C;
P
L
= 1.6 W
[1]
[1]
Value Unit
2.2
6.4
K/W
K/W
[1]
When operated with a CW signal.
7. Characteristics
Table 6.
DC characteristics
T
case
= 25
C unless otherwise specified.
Symbol Parameter
Final stage
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 0.422 mA
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
I
Dq
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
V
DS
= 10 V; I
D
= 42 mA
V
DS
= 28 V; I
D
= 253 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 1478 mA
65
1.5
1.7
-
-
-
-
-
-
1.9
2.1
-
7.8
-
350
-
2.3
2.5
1.4
-
140
-
257
V
V
V
A
A
nA
S
m
mA
Conditions
Min Typ
Max Unit
2.85 -
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 1.48 A
quiescent drain current
main transistor: V
DS
= 28 V
sense transistor: I
D
= 7 mA;
V
DS
= 28 V
208 233
Driver stage
V
(BR)DSS
drain-source breakdown voltage V
GS
= 0 V; I
D
= 0.116 mA
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
I
Dq
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
V
DS
= 10 V; I
D
= 11.6 mA
V
DS
= 28 V; I
D
= 69.6 mA
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 10 V; I
D
= 406 mA
65
1.5
1.7
-
-
-
-
-
67
-
1.9
2.1
-
2.2
-
0.8
-
2.3
2.5
1.4
-
140
-
V
V
V
A
A
nA
S
m
mA
drain-source on-state resistance V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 0.4 A
quiescent drain current
main transistor: V
DS
= 28 V
sense transistor: I
D
= 7 mA;
V
DS
= 28 V
2350 -
75
83
BLM7G24S-30BG
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Product data sheet
Rev. 2 — 1 July 2015
4 of 19
NXP Semiconductors
BLM7G24S-30BG
LDMOS 2-stage power MMIC
Table 7.
RF Characteristics
Typical RF performance at T
case
= 25
C; V
DS
= 28 V; I
Dq1
= 75 mA; I
Dq2
= 233 mA. Test signal:
2-carrier W-CDMA; 3GPP test model 1; 64 DPCH; clipping at 46 %; PAR = 8.4 dB at 0.01%
probability on CCDF per carrier; carrier spacing = 5 MHz; f
1
= 2112.5 MHz; f
2
= 2117.5 MHz;
f
3
= 2162.5 MHz; f
4
= 2167.5 MHz; unless otherwise specified measured in a class-AB production
circuit.
Symbol
G
p
D
RL
in
ACPR
Parameter
power gain
drain efficiency
input return loss
adjacent channel power ratio
Conditions
P
L(AV)
= 1.6 W
P
L(AV)
= 1.6 W
P
L(AV)
= 1.6 W
P
L(AV)
= 1.6 W
Min
29.5
10
-
-
Typ
31.5
11.3
17
43
Max
33.5
-
10
40
Unit
dB
%
dB
dBc
8. Application information
8.1 Circuit information for application circuit (2.1 GHz to 2.2 GHz)
Table 8.
List of components
For test circuit see
Figure 3.
Component
C1, C4, C100, C200
C2, C5, C6,
C3, C7, C10
C8
C9
C11
C101, C201
C102, C103, C105, C202, C203, C205
C104, C204
Description
capacitor
capacitor
capacitor
capacitor
capacitor
capacitor
capacitor
capacitor
Value
10
F
1
F
8.2 pF
1.6 pF
0.4 pF
100 nF
12 pF
4.7
F
-
not mounted
[2]
[1]
[1]
[1]
Remarks
electrolytic capacitor 470
F
C21, C22, C23, C24, C25, C26, C27, C28,
capacitor
C29, C30, C31, C300, C301, C302, C303,
C304, C305, C400, C401, C402, C403, C404,
C405
D100, D200
D300, D400
P100
P400
Q100, Q200
Q300, Q400
R1
R100, R200
R101, R108, R110, R208
R102
R103
R104, R203
R105
BLM7G24S-30BG
IC: LM4051
IC
potentiometer
potentiometer
IC
IC
ferrite bead
resistor
resistor
resistor
resistor
resistor
resistor
All information provided in this document is subject to legal disclaimers.
-
-
-
-
-
-
-
4.7
0
360
330
68 k
10 k
© NXP Semiconductors N.V. 2015. All rights reserved.
not mounted
do not populate
not mounted
LM7341
not mounted
1% tolerance
1% tolerance
Product data sheet
Rev. 2 — 1 July 2015
5 of 19
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