BLP05H6200XR
Power LDMOS transistor
Rev. 1 — 18 May 2015
Objective data sheet
1. Product profile
1.1 General description
A 200 W extremely rugged LDMOS power transistor for broadcast and industrial
applications in the HF to 600 MHz band.
Table 1.
Application information
f
(MHz)
pulsed RF
108
V
DS
(V)
50
P
L
(W)
200
G
p
(dB)
28
D
(%)
75
Test signal
1.2 Features and benefits
Easy power control
Integrated ESD protection
Excellent ruggedness
High efficiency
Excellent thermal stability
Designed for broadband operation (HF to 600 MHz)
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
Industrial, scientific and medical applications
Broadcast transmitter applications
NXP Semiconductors
BLP05H6200XR
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
Pinning
Description
gate 2
gate 1
drain 1
drain 2
source
[1]
Simplified outline
Graphic symbol
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name
Description
Version
SOT1223-2
Type number
BLP05H6200XR HSOP4F plastic, heatsink small outline package; 4 leads(flat)
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
[1]
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
6
65
[1]
Max
135
+11
+150
225
Unit
V
V
C
C
-
Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF
calculator.
5. Thermal characteristics
Table 5.
R
th(j-c)
Z
th(j-c)
[1]
[2]
[3]
Thermal characteristics
Conditions
T
j
= 115
C
[1][2]
[3]
Symbol Parameter
thermal resistance from junction to case
Typ
Unit
<tbd> K/W
<tbd> K/W
transient thermal impedance from junction T
j
= 150
C;
t
p
= 100
s;
to case
= 20 %
T
j
is the junction temperature.
R
th(j-c)
is measured under RF conditions.
See <tbd>.
BLP05H6200XR
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Objective data sheet
Rev. 1 — 18 May 2015
2 of 9
NXP Semiconductors
BLP05H6200XR
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C; per section unless otherwise specified.
Symbol Parameter
V
(BR)DSS
drain-source breakdown
voltage
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
R
DS(on)
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
drain-source on-state
resistance
Conditions
V
GS
= 0 V; I
D
= 1.0 mA
V
DS
= 10 V; I
D
= 100 mA
V
DS
= 50 V; I
D
= 50 mA
V
GS
= 0 V; V
DS
= 50 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 10 V
V
GS
= 11 V; V
DS
= 0 V
V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 3.5 A
Min
135
1.25
-
-
-
-
-
Typ
-
1.8
1.7
-
14.3
-
0.43
Max
-
2.25
-
1.4
-
140
-
Unit
V
V
V
A
A
nA
Table 7.
AC characteristics
T
j
= 25
C; per section unless otherwise specified.
Symbol
C
rs
C
iss
C
oss
Parameter
feedback capacitance
input capacitance
output capacitance
Conditions
V
GS
= 0 V; V
DS
= 50 V; f = 1 MHz
V
GS
= 0 V; V
DS
= 50 V; f = 1 MHz
V
GS
= 0 V; V
DS
= 50 V; f = 1 MHz
Min Typ
-
-
-
0.9
120
39
Max Unit
-
-
-
pF
pF
pF
Table 8.
RF characteristics
Test signal: pulsed RF; t
p
= 100
s;
= 20 %; f = 108 MHz; RF performance at V
DS
= 50 V;
I
Dq
= 100 mA; T
case
= 25
C; unless otherwise specified; in a class-AB production test circuit.
Symbol
G
p
RL
in
D
Parameter
power gain
input return loss
drain efficiency
Conditions
P
L
= 200 W
P
L
= 200 W
P
L
= 200 W
Min
<tbd>
-
<tbd>
Typ
28
10
75
Max
-
-
-
Unit
dB
dB
%
7. Test information
7.1 Ruggedness in class-AB operation
The BLP05H6200XR is capable of withstanding a load mismatch corresponding to
VSWR > 65 : 1 through all phases under the following conditions: V
DS
= 50 V;
I
Dq
= 100 mA; P
L
= 200 W pulsed; f = 108 MHz.
BLP05H6200XR
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Objective data sheet
Rev. 1 — 18 May 2015
3 of 9
NXP Semiconductors
BLP05H6200XR
Power LDMOS transistor
7.2 Impedance information
Fig 1.
Definition of transistor impedance
Table 9.
Typical push-pull impedance
Simulated Z
i
and Z
L
device impedance; impedance info at V
DS
= 50 V and P
L
= 200 W.
f
(MHz)
108
Z
i
()
<tbd>
Z
L
()
<tbd>
7.3 UIS avalanche energy
Table 10. Typical avalanche data per section
T
amb
= 25
C; typical test data; test jig without water cooling.
I
AS
(A)
<tbd>
<tbd>
<tbd>
E
AS
(J)
<tbd>
<tbd>
<tbd>
For information see application note
AN10273.
BLP05H6200XR
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Objective data sheet
Rev. 1 — 18 May 2015
4 of 9
NXP Semiconductors
BLP05H6200XR
Power LDMOS transistor
8. Package outline
Fig 2.
Package outline SOT1223-2 (HSOP4F)
BLP05H6200XR
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2015. All rights reserved.
Objective data sheet
Rev. 1 — 18 May 2015
5 of 9
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