Preliminary W26A02
128K
×
16 CMOS STATIC RAM
GENERAL DESCRIPTION
The
W26A02
is a normal-speed, very low-power CMOS static RAM organized as 131072 x 16 bits that
operates on a wide voltage range from 1.65V to 1.95V power supply. The
W26A02, W26A02-LE
and
W26A02
-LI, can meet the requirement of various operating temperature. This device is manufactured
using Winbond’s high performance CMOS technology.
FEATURES
•
•
•
•
•
•
Low power consumption
Access time: 70 nS
1.65V to 1.95V supply voltage
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
•
Battery back-up operation capability
•
Data retention voltage: 1.0V (min.)
•
Data byte control
−
#LB (I/O1
−
I/O8), #UB (I/O9
−
I/O16)
•
Available packages: 44-pin type two TSOP,
and TFBGA
PIN CONFIGURATIONS
BLOCK DIAGRAM
CLK GEN.
A4
A3
R
O
W
D
E
C
O
D
E
R
PRECHARGE CKT.
A4
A3
A2
A1
A0
#CS
I/O1
I/O2
I/O3
I/O4
V
DD
V
SS
I/O5
I/O6
I/O7
I/O8
#WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44-pin
TSOP
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
#OE
#UB
#LB
I/O16
I/O15
I/O14
I/O13
V
SS
V
DD
I/O12
I/O11
I/O10
I/O9
NC
A8
A9
A10
A11
NC
A15
A14
A16
A1
A2
A0
A13
I/O1
:
I/O16
CORE CELL ARRAY
1024 ROWS
128 X 16 COLUMNS
DATA
CNTRL.
CLK
GEN.
I/O CKT.
COLUMN DECODER
A7 A6
A5 A8 A9 A10 A11 A12
#WE
#CS
#UB
#LB
#OE
PIN DESCRIPTION
SYMBOL
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Lower byte select
Upper byte select
Output Enable Input
Power Supply
Ground
No Connection
A0
−
A16
TFBGA TOP VIEW
A
B
C
D
E
F
G
H
1
#LB
I/O9
I/O10
V
SS
V
DD
I/O15
I/O16
NC
2
#OE
#UB
I/O11
I/O12
I/O13
I/O14
NC
A8
3
A0
A3
A5
NC
NC
A14
A12
A9
4
A1
A4
A6
A7
A16
A15
A13
A10
5
A2
#CS
I/O2
I/O4
I/O5
I/O6
#WE
A11
6
NC
I/O1
I/O3
V
DD
V
SS
I/O7
I/O8
NC
I/O1
−
I/O16
#CS
#WE
#LB
#UB
#OE
V
DD
V
SS
NC
-1-
Publication Release Date: May 6, 2002
Revision A1
Preliminary W26A02
TRUTH TABLE
#CS
H
L
L
L
L
L
L
L
X
#OE
X
H
L
L
L
X
X
X
X
#WE
X
H
H
H
H
L
L
L
X
#LB
X
X
L
L
H
L
L
H
H
#UB
X
X
L
H
L
L
H
L
H
MODE
Not Selected
Output Disable
2 Bytes Read
Lower Byte
Read
Upper Byte
Read
2 Bytes Write
Lower Byte
Write
Upper Byte
Write
Not Selected
I/O1
−
I/O8
High Z
High Z
D
OUT
D
OUT
High Z
D
IN
D
IN
High Z
High Z
I/O9
−
I/O16
High Z
High Z
D
OUT
High Z
D
OUT
D
IN
High Z
D
IN
High Z
V
DD
CURRENT
I
SB
, I
SB
1
I
DD
I
DD
I
DD
I
DD
I
DD
I
DD
I
DD
I
SB
, I
SB
1
-2-
Preliminary W26A02
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER
Supply Voltage to V
SS
Potential
Input/Output to V
SS
Potential
Allowable Power Dissipation
Storage Temperature
Operating Temperature
LE
LI
RATING
-0.5 to +2.6
-0.5 to V
DD
+0.3
1.0
-65 to +150
-20 to 85
-40 to 85
UNIT
V
V
W
°C
°C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Operating Characteristics
(V
SS
= 0V; T
A
(°C) = -20 to 85 for LE, -40 to 85 for LI)
PARAMETER
Operating Power Voltage
Input Low Voltage
Input High Voltage
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Operating Power Supply
Current
Standby Power Supply
Current
SYM.
V
DD
V
IL
V
IH
I
LI
I
LO
V
OL
V
OH
I
DD
I
SB
I
SB1
TEST
CONDITIONS
-
-
-
V
IN
= V
SS
to V
DD
V
I/O
= V
SS
to V
DD
; #CS = V
IH
(min.) or #OE = V
IH
(min.)
or #WE = V
IL
(max.)
I
OL
= +0.1 mA
I
OH
= -0.1 mA
#CS = V
IL
(max.)
,
I/O = 0 mA;
Cycle = min. Duty = 100%
#CS = V
IH
(min.)
#CS
≥
V
DD
-0.2V
MIN.
1.65
-0.2
+1.4
-1
-1
-
1.4
-
-
-
W26A02
MAX.
1.95
+0.4
V
DD
+0.2
+1
+1
0.2
-
25
0.3
5
UNIT
V
V
V
µA
µA
V
V
mA
mA
µA
-3-
Publication Release Date: May 6, 2002
Revision A1
Preliminary W26A02
CAPACITANCE
(T
A
= 25° C, f = 1 MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYM.
C
IN
C
I/O
CONDITIONS
V
IN
= 0V
V
OUT
= 0V
MAX.
8
10
UNIT
pF
pF
Note: These parameters are sampled but not 100% tested.
AC CHARACTERISTICS
AC Test Conditions
PARAMETER
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Level
Output Load
0V to 1.6V
5 nS
0.9V
See the drawing below
CONDITIONS
AC Test Loads and Waveform
1 TTL
OUTPUT
30 pF
Including
Jig and
Scope
OUTPUT
1 TTL
5 pF
Including
Jig and
Scope
(For T
CLZ,
T
OLZ,
T
CHZ,
T
OHZ,
T
WHZ,
T
OW
)
1.6V
0V
5 nS
90%
10%
90%
10%
5 nS
-4-
Preliminary W26A02
AC Characteristics, continued
(V
SS
= 0V; T
A
(°C) = -20 to 85 for LE, -40 to 85 for LI)
Read Cycle
PARAMETER
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
#UB, #LB Access Tim
Chip Selection to Output in Low Z
Output Enable to Output in Low Z
#UB, #LB Enable to Output in Low Z
Chip Deselection to Output in High Z
Output Disable to Output in High Z
#UB, #LB Disable to Output in High Z
Output Hold from Address Change
∗These
parameters are sampled but not 100% tested
SYMBOL
T
RC
T
AA
T
ACS
T
AOE
T
BA
T
CLZ
*
T
OLZ
*
T
BLZ
*
T
CHZ
*
T
OHZ
*
T
BHZ
*
T
OH
70
-
-
-
−
10
5
5
-
-
-
10
W26A02
MIN.
MAX.
-
70
70
35
70
-
-
-
30
30
30
-
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Write Cycle
PARAMETER
Write Cycle Time
Chip Selection to End of Write
Address Valid to End of Write
#UB, #LB Select to End of Write
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid to End of Write
Data Hold from End of Write
Write to Output in High Z
Output Disable to Output in High Z
Output Active from End of Write
∗These
parameters are sampled but not 100% tested
SYMBOL
T
WC
T
CW
T
AW
T
BW
T
AS
T
WP
#CS, #WE
T
WR
T
DW
T
DH
T
WHZ
*
T
OHZ
*
T
OW
70
60
60
60
0
55
0
40
0
-
-
5
W26A02
MIN.
MAX.
-
-
-
-
-
-
-
-
-
30
30
-
UNIT
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
-5-
Publication Release Date: May 6, 2002
Revision A1
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