TPS74001DPTR datasheet, PDF - EEWORLD Datasheet

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TPS74001DPTR: DescriptionLDO Voltage Regulators Sgl Output,1.5A LDO Linear Reg; CategoryPower/power management The power supply circuit; File Size908KB，24 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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TPS74001DPTR Overview

LDO Voltage Regulators Sgl Output,1.5A LDO Linear Reg

TPS74001DPTR Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Contains lead
Is it Rohs certified?	conform to
Parts packaging code	SON
package instruction	QCCN, LCC5(UNSPEC)
Contacts	5
Reach Compliance Code	compli
ECCN code	EAR99
Is Samacsys	N
Adjustability	ADJUSTABLE
Maximum drop-back voltage 1	0.3 V
Nominal dropback voltage 1	0.1 V
JESD-30 code	R-PSSO-N5
JESD-609 code	e4
length	11 mm
Maximum grid regulation rate (%/V)	0.1
Maximum load regulation (%)	1.5%
Humidity sensitivity level	2
Number of functions	1
Output times	1
Number of terminals	5
Working temperatureTJ-Max	125 °C
Operating temperatureTJ-Mi	-40 °C
Maximum output current 1	1.5 A
Maximum output voltage 1	3.6 V
Minimum output voltage 1	0.9 V
Package body material	PLASTIC/EPOXY
encapsulated code	QCCN
Encapsulate equivalent code	LCC5(UNSPEC)
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, HEAT SINK/SLUG
method of packing	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Regulator type	ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
Maximum seat height	1.05 mm
surface mount	YES
technology	CMOS
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	NO LEAD
Terminal pitch	1.7 mm
Terminal location	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm
Base Number Matches	1

TPS74001DPTR Related Products

	TPS74001DPTR	TPS74001DGKT	TPS74001DGKR	TPS74001DPTT
Description	LDO Voltage Regulators Sgl Output,1.5A LDO Linear Reg	1.5-A, Low-Voltage LDO Regulator with Dual Input Voltages 8-VSSOP -40 to 125	1.5-A, Low-Voltage LDO Regulator with Dual Input Voltages 8-VSSOP -40 to 125	LDO Voltage Regulators Sgl Output,1.5A LDO Linear Reg
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Is it lead-free?	Contains lead	Lead free	Lead free	Contains lead
Is it Rohs certified?	conform to	conform to	conform to	conform to
Parts packaging code	SON	MSOP	MSOP	SON
package instruction	QCCN, LCC5(UNSPEC)	TSSOP, TSSOP8,.19	TSSOP, TSSOP8,.19	QCCN, LCC5(UNSPEC)
Contacts	5	8	8	5
Reach Compliance Code	compli	compli	compli	compli
ECCN code	EAR99	EAR99	EAR99	EAR99
Is Samacsys	N	N	N	N
Adjustability	ADJUSTABLE	ADJUSTABLE	ADJUSTABLE	ADJUSTABLE
Maximum drop-back voltage 1	0.3 V	0.3 V	0.3 V	0.3 V
Nominal dropback voltage 1	0.1 V	0.1 V	0.1 V	0.1 V
JESD-30 code	R-PSSO-N5	R-PDSO-G8	R-PDSO-G8	R-PSSO-N5
JESD-609 code	e4	e4	e4	e4
length	11 mm	3 mm	3 mm	11 mm
Maximum grid regulation rate (%/V)	0.1	0.1	0.1	0.1
Maximum load regulation (%)	1.5%	1.5%	1.5%	1.5%
Humidity sensitivity level	2	2	2	2
Number of functions	1	1	1	1
Output times	1	1	1	1
Number of terminals	5	8	8	5
Working temperatureTJ-Max	125 °C	125 °C	125 °C	125 °C
Operating temperatureTJ-Mi	-40 °C	-40 °C	-40 °C	-40 °C
Maximum output current 1	1.5 A	1.5 A	1.5 A	1.5 A
Maximum output voltage 1	3.6 V	5.7 V	5.7 V	3.6 V
Minimum output voltage 1	0.9 V	0.9 V	0.9 V	0.9 V
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	QCCN	TSSOP	TSSOP	QCCN
Encapsulate equivalent code	LCC5(UNSPEC)	TSSOP8,.19	TSSOP8,.19	LCC5(UNSPEC)
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, HEAT SINK/SLUG	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, HEAT SINK/SLUG
method of packing	TAPE AND REEL	TR	TR	TAPE AND REEL
Peak Reflow Temperature (Celsius)	260	260	260	260
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Regulator type	ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR	ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR	ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR	ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR
Maximum seat height	1.05 mm	1.07 mm	1.07 mm	1.05 mm
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	NO LEAD	GULL WING	GULL WING	NO LEAD
Terminal pitch	1.7 mm	0.65 mm	0.65 mm	1.7 mm
Terminal location	SINGLE	DUAL	DUAL	SINGLE
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10 mm	3 mm	3 mm	10 mm
Base Number Matches	1	1	1	1

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