SN74CBTD16210DGVR datasheet, PDF

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SN74CBTD16210DGVR: Description20-Bit FET Bus Switch With Level Shifting 48-TVSOP -40 to 85; Categorylogic logic; File Size340KB，12 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance; Related ProductsFound2parts with similar functions to SN74CBTD16210DGVR

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SN74CBTD16210DGVR Overview

20-Bit FET Bus Switch With Level Shifting 48-TVSOP -40 to 85

SN74CBTD16210DGVR Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Texas Instruments
Parts packaging code	SOIC
package instruction	TSSOP, TSSOP48,.25,16
Contacts	48
Reach Compliance Code	compli
ECCN code	EAR99
Factory Lead Time	1 week
Control type	ENABLE LOW
Counting direction	BIDIRECTIONAL
series	CBT/FST/QS/5C/B
JESD-30 code	R-PDSO-G48
JESD-609 code	e4
length	9.7 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
Humidity sensitivity level	1
Number of digits	10
Number of functions	2
Number of ports	2
Number of terminals	48
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP48,.25,16
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packing	TR
Peak Reflow Temperature (Celsius)	260
power supply	5 V
Maximum supply current (ICC)	1.5 mA
Prop。Delay @ Nom-Su	0.25 ns
propagation delay (tpd)	0.25 ns
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING
Terminal pitch	0.4 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
translate	N/A
width	4.4 mm

SN74CBTD16210DGVR Related Products

	SN74CBTD16210DGVR	SN74CBTD16210DL	SN74CBTD16210DLR	SN74CBTD16210DGGR	74CBTD16210DGVRE4	SN74CBTD16210DLG4
Description	20-Bit FET Bus Switch With Level Shifting 48-TVSOP -40 to 85	20-Bit FET Bus Switch With Level Shifting 48-SSOP -40 to 85	20-Bit FET Bus Switch With Level Shifting 48-SSOP -40 to 85	20-Bit FET Bus Switch With Level Shifting 48-TSSOP -40 to 85	20-Bit FET Bus Switch With Level Shifting 48-TVSOP -40 to 85	20-Bit FET Bus Switch With Level Shifting 48-SSOP -40 to 85
Brand Name	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments	Texas Instruments
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to	conform to
Parts packaging code	SOIC	SSOP	SSOP	TSSOP	SOIC	SSOP
package instruction	TSSOP, TSSOP48,.25,16	SSOP, SSOP48,.4	PLASTIC, SSOP-48	TSSOP, TSSOP48,.3,20	TSSOP, TSSOP48,.25,16	SSOP, SSOP48,.4
Contacts	48	48	48	48	48	48
Reach Compliance Code	compli	compli	compliant	compli	compliant	compli
Control type	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW	ENABLE LOW
Counting direction	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL	BIDIRECTIONAL
series	CBT/FST/QS/5C/B	CBT/FST/QS/5C/B	CBT/FST/QS/5C/B	CBT/FST/QS/5C/B	CBT/FST/QS/5C/B	CBT/FST/QS/5C/B
JESD-30 code	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48
JESD-609 code	e4	e4	e4	e4	e4	e4
length	9.7 mm	15.88 mm	15.88 mm	12.5 mm	9.7 mm	15.875 mm
Load capacitance (CL)	50 pF	50 pF	50 pF	50 pF	50 pF	50 pF
Logic integrated circuit type	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
Humidity sensitivity level	1	1	1	1	1	1
Number of digits	10	10	10	10	10	10
Number of functions	2	2	2	2	2	2
Number of ports	2	2	2	2	2	2
Number of terminals	48	48	48	48	48	48
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SSOP	SSOP	TSSOP	TSSOP	SSOP
Encapsulate equivalent code	TSSOP48,.25,16	SSOP48,.4	SSOP48,.4	TSSOP48,.3,20	TSSOP48,.25,16	SSOP48,.4
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260	260	260	260	260	260
power supply	5 V	5 V	5 V	5 V	5 V	5 V
Maximum supply current (ICC)	1.5 mA	1.5 mA	1.5 mA	1.5 mA	1.5 mA	1.5 mA
propagation delay (tpd)	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns	0.25 ns
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	2.79 mm	2.79 mm	1.2 mm	1.2 mm	2.79 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.4 mm	0.635 mm	0.635 mm	0.5 mm	0.4 mm	0.635 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
translate	N/A	N/A	N/A	N/A	N/A	N/A
width	4.4 mm	7.49 mm	7.49 mm	6.1 mm	4.4 mm	7.49 mm
Is it lead-free?	Lead free	Lead free	Lead free	Lead free	Lead free	-
Maker	Texas Instruments	Texas Instruments	Texas Instruments	-	Texas Instruments	Texas Instruments
Factory Lead Time	1 week	1 week	1 week	1 week	6 weeks	-
method of packing	TR	TUBE	TR	TR	TR	-
Prop。Delay @ Nom-Su	0.25 ns	0.25 ns	-	0.25 ns	-	0.25 ns

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