Ordering number : ENA0139
LC87F40C8A
CMOS IC
Internal 128K-byte FROM (ROM/CGROM),
2048 byte RAM, 1024-byte CGRAM,
and 704×10-bit CRT Display RAM
http://onsemi.com
8-bit 1-chip Microcontroller
Overview
The LC87F40C8A is a closed caption TV controlling 8-bit microcomputer that, centered around a CPU running at a
minimum bus cycle time of 71ns, integrates on a single chip a number of hardware features such as 128K-byte flash
ROM (size-variable program ROM and CGROM), 2048-byte RAM, 1024-byte CGRAM, 704×10-bit CRT display
RAM, sophisticated 16-bit timers/counters (may be divided into 8-bit timers), a 16-bit timer/counter (may be divided
into 8-bit timers/counters, two 8-bit timers with a prescaler, a base timer serving as a time-of-day clock, a high-speed
clock counter, a synchronous SIO interface (with automatic block transmission/reception capabilities), two channels
of asynchronous/
synchronous SIO interface (bus mode selectable), a UART interface (full duplex), an 8-bit 8-channel AD converter,
one 14-bit PWM channel, three 8-bit PWM channels, a closed caption data slicer, closed caption compatible OSD, a
system clock frequency divider, ROM correction function, an on-chip debugger, and onboard programming facilities.
Features
Flash
ROM
128K bytes
•
95K- to 110K-byte program ROM (size variable)
•
16K- to 31K-byte character generator ROM (size variable)
•
Runs on a 5V single source and permits onboard programming.
•
Block erasable in 128 byte units.
•
Permits 100 programming operations.
Internal
RAM
•
General-purpose RAM:
•
Character generator RAM:
•
CRT display RAM:
•
ROM correction RAM:
2K bytes
1K bytes
704
×
10 bits
256 bytes
* This product is licensed from Silicon Storage Technology, Inc. (USA).
Semiconductor Components Industries, LLC, 2013
May, 2013
Ver.1.08
D1306HKIM 20060911-S00004 No.A0139-1/26
LC87F40C8A
Minimum
Bus Cycle Time
•
71 ns (14.1MHz)
Note: The bus cycle time here refers to the ROM read speed.
Minimum
Instruction Cycle Time
•
212 ns (14.1MHz)
OSD
•
Screen size
•
Display RAM size
Display area
Control area
•
Font types
: 36 characters
×
16 lines
: 704 words (1 word=10 bits)
: 36 words
×
16 lines
: 8 words
×
16 lines
: 16
×
32 font, 512 types (16 CGRAM fonts, including 4 fixed fonts)
An arbitrary number of characters can be generated as 16
×
17 or 8
×
9 font characters.
•
Display colors
: 4096 colors
Character text, background, borders, and full background can be displayed.
•
Display mode specifiable on a line basis.
Normal, 4-color pixel map, 16-color pixel map, and caption text modes
•
Vertical display start line and horizontal display start position specifiable on a line basis.
•
Shutter function (specifying the display start or stop line) and scroll functions specifiable on a line basis.
•
Horizontal character spacing (9 to 16 dots)
*1
and vertical character spacing (1 to 32 dots) specifiable on a line basis.
•
Character size selectable from 16 character sizes on a line basis
*1
.
(Horizontal×Vertical) = (1×1), (1×2), (2×1), (2×2), (2×4)
(4×2), (4×4), (4×8), (1.5×1), (1.5×2)
(3×1), (3×2), (3×4), (6×2), (6×4), (6×8)
•
Cursor display function (4/16 pixel colors)
•
Multilayer display
•
Full screen display area specifiable.
•
OSD clock selectable (normal speed mode/high speed mode/external input)
•
Interlace/progressive scan selectable
*1: The supported range varies depending on the active display mode. Refer to the user's guide for details.
Data
Slicer Function (closed caption format)
•
Extracts closed caption data and XDS data.
•
NTSC/PAL selectable and line specifiable.
Ports
•
Normal withstand voltage I/O ports
Ports whose I/O direction can be designated in 1-bit units 41 (P1n, P2n, P3n, P70 to P73, P8n, PC0 to PC4)
Ports whose I/O direction can be designated in 4-bit units 8 (P0n)
Timers
•
Timer 0: 16-bit timer/counter with a capture register.
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) + 8-bit
counter (with an 8-bit capture register)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register)
Mode 3: 16-bit counter (with a 16-bit capture register)
•
Timer 1: 16-bit timer/counter that supports PWM/toggle outputs
Mode 0: 8-bit timer with an 8-bit prescaler + with an 8-bit prescaler 8-bit timer/counter
Mode 1: 6-bit timer/counter with an 8-bit prescaler
•
Timer 4: 8-bit timer with a 6-bit prescaler
•
Timer 5: 8-bit timer with a 6-bit prescaler
•
Base timer
1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock, and timer 0 prescaler
output.
2) Interrupts programmable in 5 different time schemes
No.A0139-2/26
LC87F40C8A
High-speed
Clock Counter
1) Can count clocks with a maximum clock rate of 28.2MHz (at a main clock of 14.1MHz).
2) Can generate output real-time.
SIO
•
SIO0: 8-bit synchronous serial interface
1) LSB first/MSB first mode selectable
2) Built-in 8-bit baudrate generator (maximum transfer clock cycle = 4/3 tCYC)
3) Automatic continuous data transmission (1 to 256 bits, specifiable in 1 bit units, suspension and resumption of
data transmission possible in 1 byte units)
•
SIO1: 8-bit asynchronous/synchronous serial interface (bus mode 1 system)
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
•
SIO6: 8-bit asynchronous/synchronous serial interface (bus mode 2 system)
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect)
UART
•
Full duplex
•
7/8/9 data bits selectable
•
1 stop bit
•
Built-in baudrate generator
AD
Converter: 8 bits
×
8 channels
PWM:
14-bit PWM
×
1 channel
8-bit PWM
×
3 channels
Remote
Control Receiver Circuit (sharing with P73, INT3, and T0IN pins)
•
Noise rejection function (noise filter time constant selectable from 1 tCYC, 32 tCYC, and 128 tCYC)
Watchdog
Timer
•
External RC watchdog timer
•
Interrupt and reset signals selectable
High-speed
Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
No.A0139-3/26
LC87F40C8A
Interrupts
•
21 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest level
takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest vector
address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2/T0L
INT3/base timer
T0H
T1L/T1H
SIO0/UART1 receive
SIO1/UART1 transmit/data slicer/SIO6
ADC/vertical sync (VS)/scan line
Port 0/T4/T5
Interrupt Source
•
Priority levels X > H > L
•
Of interrupts of the same level, the one with the smallest vector address takes precedence.
Subroutine
Stack Levels: 1024 levels maximum (the stack is allocated in RAM.)
Oscillation
Circuits
•
RC oscillation circuit (internal)
: For system clock
•
VCO oscillation circuit (internal) : For system clock generation and CRT display
•
Crystal oscillation circuit
: For low-speed system clock, base timer, and PLL reference
System
Clock Divider Function
•
Can run on low current.
•
The minimum instruction cycle selectable from 212ns, 424ns, 848ns, 1.7μs, 3.4μs, 6.8μs, 13.6μs, 27.1μs, and
54.3μs (at a main clock rate of 14.1MHz).
Standby
Function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
1) Oscillation is not halted automatically.
2) Canceled by a system reset or occurrence of an interrupt
•
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The VCO, RC, and crystal oscillators automatically stop operation.
2) There are three ways of resetting the HOLD mode.
(1) Setting the reset pin to the lower level.
(2) Setting at least one of the INT0, INT1, and INT2 pins to the specified level
(3) Having an interrupt source established at port 0
ROM
Correction Function
•
Executes the correction program on detection of a match with the program counter value.
•
Correction program area size: 256 bytes (4 vector addresses)
Onchip
Debugger
•
Supports software debugging with the IC mounted on the target board
Package
Form
•
QIP64E(14×14): Lead-free type
•
DIP64S(600mil): Lead-free type
Development
Tools
•
Onchip debugger interface board: TCB87 (Type B)
No.A0139-4/26
LC87F40C8A
Package Dimensions
unit : mm (typ)
3159A
17.2
14.0
48
49
33
32
14.0
64
1
0.8
(1.0)
(2.7)
17
16
0.35
0.15
3.0max
0.1
SANYO : QIP64E(14X14)
Package Dimensions
unit : mm (typ)
3300
57.2
64
17.2
0.8
33
0.95
5.1max
0.51min
3.8
(4.25)
1.78
(1.01)
0.5
SANYO : DIP64S(600mil)
0.2
1
32
15.24
13.8
No.A0139-5/26
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