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CDCL1810ARGZR

Description
1.8V 1-to-10 High Performance Differential Clock Buffer with Individual Output Enable/Disable 48-VQFN -40 to 85
Categorylogic    logic   
File Size1021KB,30 Pages
ManufacturerTexas Instruments
Websitehttp://www.ti.com.cn/
Environmental Compliance
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CDCL1810ARGZR Overview

1.8V 1-to-10 High Performance Differential Clock Buffer with Individual Output Enable/Disable 48-VQFN -40 to 85

CDCL1810ARGZR Parametric

Parameter NameAttribute value
Brand NameTexas Instruments
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerTexas Instruments
package instructionVQFN-48
Reach Compliance Codecompliant
Factory Lead Time6 weeks
seriesCDCL
Input adjustmentDIFFERENTIAL
JESD-30 codeS-PQCC-N48
JESD-609 codee4
length7 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals48
Actual output times20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
method of packingTR
Peak Reflow Temperature (Celsius)260
Same Edge Skew-Max(tskwd)0.064 ns
Maximum seat height1 mm
Maximum supply voltage (Vsup)1.9 V
Minimum supply voltage (Vsup)1.7 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width7 mm
minfmax650 MHz
Base Number Matches1

CDCL1810ARGZR Related Products

CDCL1810ARGZR CDCL1810ARGZT
Description 1.8V 1-to-10 High Performance Differential Clock Buffer with Individual Output Enable/Disable 48-VQFN -40 to 85 1.8V 1-to-10 High Performance Differential Clock Buffer with Individual Output Enable/Disable 48-VQFN -40 to 85
Brand Name Texas Instruments Texas Instruments
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker Texas Instruments Texas Instruments
package instruction VQFN-48 VQFN-48
Reach Compliance Code compliant compliant
Factory Lead Time 6 weeks 6 weeks
series CDCL CDCL
Input adjustment DIFFERENTIAL DIFFERENTIAL
JESD-30 code S-PQCC-N48 S-PQCC-N48
JESD-609 code e4 e4
length 7 mm 7 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Humidity sensitivity level 3 3
Number of functions 1 1
Number of terminals 48 48
Actual output times 20 20
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code HVQCCN HVQCCN
Package shape SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
method of packing TR TR
Peak Reflow Temperature (Celsius) 260 260
Same Edge Skew-Max(tskwd) 0.064 ns 0.064 ns
Maximum seat height 1 mm 1 mm
Maximum supply voltage (Vsup) 1.9 V 1.9 V
Minimum supply voltage (Vsup) 1.7 V 1.7 V
Nominal supply voltage (Vsup) 1.8 V 1.8 V
surface mount YES YES
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal form NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
width 7 mm 7 mm
minfmax 650 MHz 650 MHz
Base Number Matches 1 1

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