W9412G6IH-5I datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > storage> storage> W9412G6IH-5I

W9412G6IH-5I: DescriptionDDR DRAM, 8MX16, 0.7ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66; Categorystorage storage; File Size825KB，53 Pages; ManufacturerWinbond Electronics Corporation; Websitehttp://www.winbond.com.tw; Environmental Compliance

Download Datasheet Parametric Compare View All

W9412G6IH-5I Overview

DDR DRAM, 8MX16, 0.7ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66

W9412G6IH-5I Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Winbond Electronics Corporation
Parts packaging code	TSOP2
package instruction	TSOP2, TSSOP66,.46
Contacts	66
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	FOUR BANK PAGE BURST
Maximum access time	0.7 ns
Other features	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz
I/O type	COMMON
interleaved burst length	2,4,8
JESD-30 code	R-PDSO-G66
length	22.22 mm
memory density	134217728 bit
Memory IC Type	DDR DRAM
memory width	16
Number of functions	1
Number of ports	1
Number of terminals	66
word count	8388608 words
character code	8000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	8MX16
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP2
Encapsulate equivalent code	TSSOP66,.46
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5 V
Certification status	Not Qualified
refresh cycle	4096
Maximum seat height	1.2 mm
self refresh	YES
Continuous burst length	2,4,8
Maximum standby current	0.02 A
Maximum slew rate	0.32 mA
Maximum supply voltage (Vsup)	2.7 V
Minimum supply voltage (Vsup)	2.3 V
Nominal supply voltage (Vsup)	2.5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10.16 mm

Preview

Download Datasheet

View All

W9412G6IH

4 BANKS

16 BITS DDR SDRAM

Table of Contents-

GENERAL DESCRIPTION ......................................................................................................... 4

FEATURES ................................................................................................................................. 4

KEY PARAMETERS ................................................................................................................... 5

PIN CONFIGURATION ............................................................................................................... 6

PIN DESCRIPTION..................................................................................................................... 7

BLOCK DIAGRAM ...................................................................................................................... 8

FUNCTIONAL DESCRIPTION.................................................................................................... 9

7.1

7.2

Power Up Sequence....................................................................................................... 9

Command Function ...................................................................................................... 10

7.2.1

Bank Activate Command ........................................................................... 10

7.2.2

7.2.3

7.2.4

7.2.5

7.2.6

7.2.7

7.2.8

7.2.9

7.2.10

7.2.11

7.2.12

7.2.13

7.2.14

7.2.15

7.2.16

7.3

7.4

7.5

7.6

7.7

7.8

7.9

7.10

Bank Precharge Command........................................................................ 10

Precharge All Command............................................................................ 10

Write Command ......................................................................................... 10

Write with Auto-precharge Command........................................................ 10

Read Command ......................................................................................... 10

Read with Auto-precharge Command ....................................................... 10

Mode Register Set Command.................................................................... 11

Extended Mode Register Set Command ................................................... 11

No-Operation Command............................................................................ 11

Burst Read Stop Command ....................................................................... 11

Device Deselect Command ....................................................................... 11

Auto Refresh Command ............................................................................ 11

Self Refresh Entry Command .................................................................... 12

Self Refresh Exit Command....................................................................... 12

Data Write Enable /Disable Command ...................................................... 12

Read Operation............................................................................................................. 12

Write Operation............................................................................................................. 13

Precharge ..................................................................................................................... 13

Burst Termination.......................................................................................................... 13

Refresh Operation......................................................................................................... 13

Power Down Mode ....................................................................................................... 14

Input Clock Frequency Change during Precharge Power Down Mode........................ 14

Mode Register Operation.............................................................................................. 14

Publication Release Date: Sep. 16, 2009

Revision A06

-1-

W9412G6IH

7.10.1

7.10.2

7.10.3

7.10.4

7.10.5

7.10.6

7.10.7

8.1

8.2

8.3

8.4

9.1

9.2

9.3

9.4

9.5

9.6

9.7

10.

10.1

10.2

10.3

10.4

10.5

10.6

10.7

10.8

10.9

11.

11.1

11.2

11.3

11.4

11.5

11.6

Burst Length field (A2 to A0)...................................................................... 14

Addressing Mode Select (A3) .................................................................... 15

CAS Latency field (A6 to A4) ..................................................................... 16

DLL Reset bit (A8) ..................................................................................... 16

Mode Register/Extended Mode register change bits (BA0, BA1).............. 16

Extended Mode Register field.................................................................... 16

Reserved field ............................................................................................ 16

OPERATION MODE ................................................................................................................. 17

Simplified Truth Table................................................................................................... 17

Function Truth Table..................................................................................................... 18

Function Truth Table for CKE ....................................................................................... 21

Simplified Stated Diagram ............................................................................................ 22

Absolute Maximum Ratings .......................................................................................... 23

Recommended DC Operating Conditions .................................................................... 23

Capacitance .................................................................................................................. 24

Leakage and Output Buffer Characteristics.................................................................. 24

DC Characteristics ........................................................................................................ 25

AC Characteristics and Operating Condition................................................................ 26

AC Test Conditions....................................................................................................... 27

Table 1: Input Slew Rate for DQ, DQS, and DM .......................................................... 30

Table 2: Input Setup & Hold Time Derating for Slew Rate ........................................... 30

Table 3: Input/Output Setup & Hold Time Derating for Slew Rate ............................... 30

Table 4: Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate................ 30

Table 5: Output Slew Rate Characteristics (X16 Devices only) ................................... 30

Table 6: Output Slew Rate Matching Ratio Characteristics ......................................... 31

Table 7: AC Overshoot/Undershoot Specification for Address and Control Pins......... 31

Table 8: Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins.......... 32

System Notes:............................................................................................................... 33

Command Input Timing ................................................................................................ 35

Timing of the CLK Signals ............................................................................................ 35

Read Timing (Burst Length = 4) ................................................................................... 36

Write Timing (Burst Length = 4).................................................................................... 37

DM, DATA MASK (W9412G6IH) .................................................................................. 38

Mode Register Set (MRS) Timing................................................................................. 39

Publication Release Date: Sep. 16, 2009

Revision A06

ELECTRICAL CHARACTERISTICS......................................................................................... 23

SYSTEM CHARACTERISTICS FOR DDR SDRAM................................................................. 30

TIMING WAVEFORMS ............................................................................................................. 35

-2-

W9412G6IH

11.7

11.8

11.9

11.10

11.11

11.12

11.13

11.14

11.15

11.16

11.17

11.18

11.19

11.20

11.21

11.22

11.23

11.24

11.25

11.26

12.

13.

12.1

Extend Mode Register Set (EMRS) Timing .................................................................. 40

Auto-precharge Timing (Read Cycle, CL = 2) .............................................................. 41

Auto-precharge Timing (Read cycle, CL = 2), continued ............................................. 42

Auto-precharge Timing (Write Cycle).......................................................................... 43

Read Interrupted by Read (CL = 2, BL = 2, 4, 8) ........................................................ 44

Burst Read Stop (BL = 8) ............................................................................................ 44

Read Interrupted by Write & BST (BL = 8).................................................................. 45

Read Interrupted by Precharge (BL = 8) ..................................................................... 45

Write Interrupted by Write (BL = 2, 4, 8) ..................................................................... 46

Write Interrupted by Read (CL = 2, BL = 8) ................................................................ 46

Write Interrupted by Read (CL = 3, BL = 4) ................................................................ 47

Write Interrupted by Precharge (BL = 8) ..................................................................... 47

2 Bank Interleave Read Operation (CL = 2, BL = 2) ................................................... 48

2 Bank Interleave Read Operation (CL = 2, BL = 4) ................................................... 48

4 Bank Interleave Read Operation (CL = 2, BL = 2) ................................................... 49

4 Bank Interleave Read Operation (CL = 2, BL = 4) ................................................... 49

Auto Refresh Cycle ..................................................................................................... 50

Precharged/Active Power Down Mode Entry and Exit Timing .................................... 50

Input Clock Frequency Change during Precharge Power Down Mode Timing .......... 50

Self Refresh Entry and Exit Timing ............................................................................. 51

66L TSOP – 400 mil ..................................................................................................... 52

Package Specification............................................................................................................... 52

REVISION HISTORY ................................................................................................................ 53

-3-

Publication Release Date: Sep. 16, 2009

Revision A06

W9412G6IH-5I Related Products

	W9412G6IH-5I	W9412G6IH-5	W9412G6IH-6	W9412G6IH-6I	W9412G6IH-4
Description	DDR DRAM, 8MX16, 0.7ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66	IC ddr sdram 128m 250mhz 66tsop	DDR DRAM, 8MX16, 0.7ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66	DDR DRAM, 8MX16, 0.7ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66	DDR DRAM, 8MX16, 0.65ns, CMOS, PDSO66, 0.400 INCH, ROHS COMPLIANT, TSOP2-66
Is it Rohs certified?	conform to	conform to	conform to	conform to	conform to
Maker	Winbond Electronics Corporation	Winbond Electronics Corporation	Winbond Electronics Corporation	Winbond Electronics Corporation	Winbond Electronics Corporation
Parts packaging code	TSOP2	TSOP2	TSOP2	TSOP2	TSOP2
package instruction	TSOP2, TSSOP66,.46	TSOP2, TSSOP66,.46	TSOP2, TSSOP66,.46	TSOP2, TSSOP66,.46	TSOP2, TSSOP66,.46
Contacts	66	66	66	66	66
Reach Compliance Code	compliant	compliant	compliant	compliant	compli
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST	FOUR BANK PAGE BURST
Maximum access time	0.7 ns	0.7 ns	0.7 ns	0.7 ns	0.65 ns
Other features	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH	AUTO/SELF REFRESH
Maximum clock frequency (fCLK)	200 MHz	200 MHz	166 MHz	166 MHz	250 MHz
I/O type	COMMON	COMMON	COMMON	COMMON	COMMON
interleaved burst length	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8
JESD-30 code	R-PDSO-G66	R-PDSO-G66	R-PDSO-G66	R-PDSO-G66	R-PDSO-G66
length	22.22 mm	22.22 mm	22.22 mm	22.22 mm	22.22 mm
memory density	134217728 bit	134217728 bit	134217728 bit	134217728 bit	134217728 bi
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
memory width	16	16	16	16	16
Number of functions	1	1	1	1	1
Number of ports	1	1	1	1	1
Number of terminals	66	66	66	66	66
word count	8388608 words	8388608 words	8388608 words	8388608 words	8388608 words
character code	8000000	8000000	8000000	8000000	8000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	70 °C	70 °C	85 °C	70 °C
organize	8MX16	8MX16	8MX16	8MX16	8MX16
Output characteristics	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSOP2	TSOP2	TSOP2	TSOP2	TSOP2
Encapsulate equivalent code	TSSOP66,.46	TSSOP66,.46	TSSOP66,.46	TSSOP66,.46	TSSOP66,.46
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	2.5 V	2.5 V	2.5 V	2.5 V	2.6 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
refresh cycle	4096	4096	4096	4096	4096
Maximum seat height	1.2 mm	1.2 mm	1.2 mm	1.2 mm	1.2 mm
self refresh	YES	YES	YES	YES	YES
Continuous burst length	2,4,8	2,4,8	2,4,8	2,4,8	2,4,8
Maximum standby current	0.02 A	0.02 A	0.02 A	0.02 A	0.02 A
Maximum slew rate	0.32 mA	0.32 mA	0.3 mA	0.3 mA	0.32 mA
Maximum supply voltage (Vsup)	2.7 V	2.7 V	2.7 V	2.7 V	2.7 V
Minimum supply voltage (Vsup)	2.3 V	2.3 V	2.3 V	2.3 V	2.4 V
Nominal supply voltage (Vsup)	2.5 V	2.5 V	2.5 V	2.5 V	2.5 V
surface mount	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL
Terminal form	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
Terminal pitch	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.65 mm
Terminal location	DUAL	DUAL	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	10.16 mm	10.16 mm	10.16 mm	10.16 mm	10.16 mm

Recommended Resources

Wire-controlled music lights and stepless dimming dual-purpose controller

Improvement of iron gates for entrance and exit of lift passage

Long distance transmission voltage frequency conversion circuit

Type 8840A 5 1/2 digit desktop smart digital multimeter circuit

Luminous electronic hypnosis device

push-pull oscillator circuit

Thermostat reference design based on TI SimpleLink wireless MCU: Most smart thermostat designers want to design a low-power, connected, microcontroller (MCU)-based smart thermostat that can securely connect a variety of sensors to the cloud for remote monitoring an...; Jacktang Wireless Connectivity

Recommend a CNC power supply circuit 0-30v 4A 5V 1A: At 0.1V, it carries 4A, and the voltage fluctuation between no-load and full-load is no more than 1mV, with an error of only 0.001V. The theoretical minimum step is 0.0073V and the actual step is 0.1V...; tonytong Power technology

Epitaxial wafer and LED chip detection issues: 1. Epitaxial wafer refers to the semiconductor film grown on the substrate. The film is mainly composed of three parts: P-type, quantum well, and N-type. The mainstream epitaxial material is gallium n...; 探路者 LED Zone

UCS module clock source setting when using CC430F5137 TimerA: [i=s] This post was last edited by langsunny on 2015-11-11 10:42 [/i] In setting TimerA, SMCLK was selected as the clock source. When configuring SMCLK to use dco as the source, it seems to be unsucce...; langsunny TI Technology Forum

【T Book Collection】Fault Tolerance and Redundancy Technology Related Special Issues: {:1_102:}The second batch of goods this week is here~~~~Forum friends who are interested in this technology, come and have a look~~Good information worth collecting~~ [url=https://download.eeworld.com...; tyw Download Centre

I would like to ask, does the STM32 ADC calibration adjust the absolute accuracy or the relative accuracy?: Is it possible to not measure VREFINT after calibration? From EEWORLD cooperation group: arm linux fpga embedded 0 (49900581) group leader: wangkj...; IC_WarMonkey stm32/stm8

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components