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WF2M32U-90G2UE5

Description
Flash Module, 2MX32, 90ns, CQFP68, 22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMATIC SEALED, CERAMIC, QFP-68
File Size213KB,14 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

WF2M32U-90G2UE5 Overview

Flash Module, 2MX32, 90ns, CQFP68, 22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMATIC SEALED, CERAMIC, QFP-68

WF2M32U-90G2UE5 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Objectid1820321055
Parts packaging codeQFP
package instruction22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMATIC SEALED, CERAMIC, QFP-68
Contacts68
Reach Compliance Codeunknown
ECCN codeEAR99
YTEOL0
Maximum access time90 ns
JESD-30 codeS-CQFP-G68
JESD-609 codee4
length22.36 mm
memory density67108864 bit
Memory IC TypeFLASH MODULE
memory width32
Number of functions1
Number of terminals68
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature100 °C
Minimum operating temperature-55 °C
organize2MX32
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQFP
Package shapeSQUARE
Package formFLATPACK
Parallel/SerialPARALLEL
Programming voltage5 V
Certification statusNot Qualified
Maximum seat height3.51 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelOTHER
Terminal surfaceGOLD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationQUAD
typeNOR TYPE
width22.36 mm
White Electronic Designs
2Mx32 5V Flash Module
FEATURES
Access Time of 90, 120, 150ns
Packaging:
• 66 pin, PGA Type, 1.185" square, Hermetic
Ceramic HIP (Package 401).
• 68 lead, Hermetic CQFP (G2U), 22.4mm
(0.880") square (Package 510) 3.56mm
(0.140") height. Designed to fit JEDEC 68 lead
0.990" CQFJ footprint (Fig. 3)
Sector Architecture
• 32 equal size sectors of 64KBytes per each
2Mx8 chip
• Any combination of sectors can be erased.
Also supports full chip erase.
Minimum 100,000 Write/Erase Cycles Minimum
Organized as 2Mx32
PRELIMINARY*
WF2M32-XXX5
Commercial, Industrial, and Extended Tempera-
ture Ranges
5 Volt Read and Write. 5V ± 10% Supply.
Low Power CMOS
Data Polling and Toggle Bit feature for detection
of program or erase cycle completion.
Supports reading or programming data to a
sector not being erased.
RESET pin resets internal state machine to the
read mode.
Built in Decoupling Caps and Multiple Ground
Pins for Low Noise Operation, Separate Power
and Ground Planes to improve noise immunity
* This data sheet describes a product under development, not fully characterized,
and is subject to change without notice.
Note:
For programming information refer to Flash Programming 16M5 Application
Note.
FIG. 1
1
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
A
18
I/O
0
I/O
1
I/O
2
11
PIN CONFIGURATION FOR WF2M32-XHX5
TOP VIEW
12
WE
2
CS
2
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
A
19
I/O
3
22
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE
A
17
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
A
20
A
13
A
8
I/O
16
I/O
17
I/O
18
44
34
V
CC
CS
4
WE
4
I/O
27
A
4
A
5
A
6
WE
3
CS
3
GND
I/O
19
55
45
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
66
8
PIN DESCRIPTION
I/O0-31
A
0-20
WE
1-4
CS
1-4
OE
VCC
GND
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
56
BLOCK DIAGRAM
W E
1
CS
1
OE
A
0
-
20
2M x 8
2M x 8
W E
2
CS
2
W E
3
CS
3
W E
4
CS
4
2M x 8
2M x 8
8
8
8
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
RESET internally tied to Vcc in the HIP package for this pin
configuration. See Alternate Pin Configuration with RESET tied
to pin 12 for system control of reset (Fig. 10, page 11).
December 2003 Rev.4
1
White Electronic Designs Corporation • (602) 437-1520 •

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