W536Q120 datasheet, PDF - EEWORLD Datasheet

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W536Q120: DescriptionMicrocontroller, 4-Bit, MROM, 4MHz, CMOS, COB; CategoryThe embedded processor and controller Microcontrollers and processors; File Size286KB，16 Pages; ManufacturerWinbond Electronics Corporation; Websitehttp://www.winbond.com.tw

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W536Q120 Overview

Microcontroller, 4-Bit, MROM, 4MHz, CMOS, COB

W536Q120 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Winbond Electronics Corporation
Parts packaging code	COB
package instruction	, DIE OR CHIP
Reach Compliance Code	unknown
bit size	4
JESD-30 code	X-XXSS-N
JESD-609 code	e0
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	UNSPECIFIED
Encapsulate equivalent code	DIE OR CHIP
Package shape	UNSPECIFIED
Package form	SPECIAL SHAPE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	2.5/5 V
Certification status	Not Qualified
RAM (bytes)	512
rom(word)	16384
ROM programmability	MROM
speed	4 MHz
Maximum slew rate	0.7 mA
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	NO LEAD
Terminal location	UNSPECIFIED
Maximum time at peak reflow temperature	NOT SPECIFIED
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

W536Q120 Preview

W536Q020/Q030/Q060/Q090/Q120

VOICE/MELODY/LCD CONTROLLER

(ViewTalk

Series)

Table of Contents-

GENERAL DESCRIPTION ......................................................................................................... 2

FEATURES ................................................................................................................................. 3

BLOCK DIAGRAM ...................................................................................................................... 5

PAD DESCRIPTION ................................................................................................................... 6

ELECTRICAL CHARACTERISTICS........................................................................................... 9

5.1

5.2

5.3

Absolute Maximum Ratings............................................................................................... 9

DC Characteristics............................................................................................................. 9

AC Characteristics ........................................................................................................... 11

TYPICAL APPLICATION CIRCUITS ........................................................................................ 14

6.1

6.2

Sub Clock with RC Mode................................................................................................. 14

Sub Clock with Crystal Mode........................................................................................... 15

REVISION HISTORY ................................................................................................................ 16

-1-

Publication Release Date: May 20, 2003

Revision A2

W536Q020/Q030/Q060/Q090/Q120

1. GENERAL DESCRIPTION

The W536QXXX, a member of

ViewTalk

family, is a high-performance 4-bit micro-controller (uC)

with built-in speech unit, melody unit and 40seg * 16 com LCD driver unit which includes internal

regulator pump circuit and dedicated one pages LCD RAM. The 4-bit uC core contains dual clock

source, 4-bit ALU, two 8-bit timers, one 14 bits divider, 12 pads for input or output, 7 interrupt sources

and 8-level nesting for subroutine/interrupt applications. Speech unit, integrated as a single chip with

maximum 128 seconds (based on 6.4K sample rate with 5 bits MDPCM), is capable of expanding to

512 seconds speech addressed by external memory W55XXX with serial bus interface.

It can be implemented with Winbond Power Speech using MDPCM algorithm. Melody unit provides

dual tone output and can store up to 1k notes. Power reduction mode is also built in to minimize power

dissipation. It is ideal for games, educational toys, remote controllers, watches, clocks and other

application products that incorporate both LCD display and speech.

PART NO

W536Q020

W536Q030

W536Q060

W536Q090

W536Q120

Voice

I/O pad

WDT disable/Enable

(Mask Option)

Sub-clock

RC/XTAL Mode

(Mask Option)

RD port shared as serial

bus

(Mask Option)

Tri-state serial bus

(Mask Option) (3)

Cascaded Voice ROM

through serial bus (2)

Notes:

20 sec

8I/O, 4I

(RA/RB/RD)

30 sec

8I/O, 4I

(RA/RB/RD)

60 sec

8I/O, 8I

(RA/RB/RC/RD)

90 sec

8I/O, 8I, 8O

(RA/RB/RC/RD/

RE/RF)

120 sec

8I/O, 8I, 8O

(RA/RB/RC/RD/

RE/RF)

Y(1)

1. Share 3 pads of RD port (RD1/ADDR, RD2/DATA and RD3/CLK)

2. Dedicate serial bus 3 pads (ADDR, DATA and CLK) to interface with W55XXX. Cascaded Voice ROM can help to expand

voice up to 512 sec by W55XXX chip.

3. Tri-state serial bus mask option can float serial bus while voice playing is no active. Let this mask option is disabled to get

minimum power consumption in general.

-2-

W536Q020/Q030/Q060/Q090/Q120

2. FEATURES

•

Operating voltage: 2.4 volt ~ 5.5 volt

•

Watch dog disabled/enabled by mask option

•

Dual clock operating system

−

Main clock with Ring/Crystal (400 KHz to 4 MHz)

−

Sub-clock with 32.768 KHz RC/Crystal by mask option

•

Memory

−

Program ROM (P-ROM): 16K

20 (ROM Bank0)

−

Data RAM (W-RAM): 1K

4 bit

(RAM Bank 0 is 512 nibbles from 0:000~0:1FF and 0:380~0:3FF are mapped to special

RAM Bank F is 512 nibbles from F: 200~F: 3FF either data RAM or dedicated to script

kernel)

−

LCD RAM (L-RAM): 160× 4 bit

1 pages (RAM Bank1 from

260~2FF)

•

Maximum 24 input/output pads

−

Ports for input only: 8 pads (RC, RD port; RD1~3 can share as serial bus for external

memory W55XXX interface @W536Q020/Q030/Q060)

−

Ports for output only: 8 pads (RE & RF port; W536Q090/Q120 available only)

−

Ports for Input/output: 8 pads (RA and RB port)

•

Power-down mode

−

Hold mode (except for 32kHz oscillator)

−

Stop mode (including 32kHz oscillator and release by RD or RC port)

•

Seven types of interrupts

−

Five internal interrupts (Divider, Timer 0, Timer 1, Speech, Melody)

−

Two external interrupts (RD, RA)

•

One built-in 14-bit clock frequency divider circuit

•

Two built-in 8-bit programmable countdown timers

−

Timer 0: one of two clock sources (FOSC/4 or FOSC/1024) can be selected

−

Timer 1: built-in auto-reload function includes internal timer

•

Built-in 18/14-bit watchdog timer for system reset.

•

Powerful instruction sets

•

8-level subroutine (including interrupt) nesting

•

LCD driver unit capability

−

VLCD higher than (V

-0.5V)

Built-in voltage regulator to V2 pad

40 seg

16 com (seg: 24~63; com: 0~15)

1/16 or 1/8 duty, 1/5 or 1/4 bias, internal pump circuit option by special register

COM 8~15 and SEG40~63 can be shared as general input/output by special register

Either uC ROM or voice ROM used as LCD picture

Publication Release Date: May 20, 2003

Revision A2

-3-

W536Q020/Q030/Q060/Q090/Q120

•

Speech function

−

Provided 640K/ 1M/ 2M/ 3M/ 4M bits Voice ROM for W536Q020/ Q030/ Q060/ Q090/

Q120 based on 5 bits MDPCM algorithm

−

Voice ROM (V-ROM) available for uC data or LCD picture data.

−

Maximum 8*256 Label/Interrupt vector (voice section number) available

−

Provide two types of speech busy flag to either each GO or each trigger

−

Maximum up to 16M bits speech address capability interface with external memory

W55XXX through serial bus.

•

Melody function

−

Provide 1K notes (22bits/note) dedicated melody ROM

−

Provide two types of melody busy flag to uC either each note or each song

−

Provide 6 kinds of beat, 16 kinds of tempo, and pitch range from G3# to C7

−

Tremolo, triple frequency and 3 kinds of percussion available

−

Maximum 31 songs available

•

Can mix speech with melody

•

Multi-engine controller

•

Direct driving speaker/buzzer or DAC output

•

Chip On Board available

-4-

W536Q020/Q030/Q060/Q090/Q120

BLOCK DIAGRAM

SEG24~63

COM0~15

V3,V4,V5,V6

DH1,DH2

RAM

1K*4Bit

LCD DRIVER

VDD

VLCD PUMP &

REGULATOR

VSS

PORT RA

TONE

RA0~3

ROM

16K*20Bit

ACC

PORT RB

PORT RC

PORT RD

PORT RE

PORT RF

RB0~3

RC0~3

RD0~3

RE0~3

RF0~3

ALU

Special Register

IEF

HCF

STACK

(8 Levels)

FLAG1

LPX0

LPX4

HEF

SPC

PM0

LPX1

LPX5

PEF

MLD

MR0

LPX2

LPY0

EVF

FLAG0

PSR0

LPX3

LPY1

SPC_busy

SPC_play

LPXY

Shared_ROM Data

Parallel

to Serial

WRP

RDP

SPDATA

Speech

MDPCM

core

ROSC

VSSP

Timer 0

Timer 1

Interrupt ,Hold & Stop

Control

MLD_busy

MLD_play

Voice ROM

(640K/1Mbits)

PWM/DAC

Mix

Block

PWM1/DAC

PWM2

VDDP

Watch Dog

Divide

Timing

Generator

Dual

Tone

melody

(1K notes)

TEST

RES

XIN

XOUT X32I X32O

-5-

Publication Release Date: May 20, 2003

Revision A2

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