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5962-01-407-9563

Description
UV PLD, 35ns, 128-Cell, CMOS, CPGA68,
CategoryProgrammable logic devices    Programmable logic   
File Size437KB,10 Pages
ManufacturerAltera (Intel)
Download Datasheet Parametric View All

5962-01-407-9563 Overview

UV PLD, 35ns, 128-Cell, CMOS, CPGA68,

5962-01-407-9563 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
package instructionPGA, PGA68,11X11
Reach Compliance Codecompli
ECCN code3A001.A.2.C
Other featuresNO
In-system programmableNO
JESD-30 codeS-XPGA-P68
JTAG BSTNO
Number of macro cells128
Number of terminals68
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC
encapsulated codePGA
Encapsulate equivalent codePGA68,11X11
Package shapeSQUARE
Package formGRID ARRAY
power supply5 V
Programmable logic typeUV PLD
propagation delay35 ns
Certification statusNot Qualified
Filter level38535Q/M;38534H;883B
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationPERPENDICULAR
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