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EP1SGX40DF672I5ES

Description
Field Programmable Gate Array, CMOS, PBGA672, 27 X 27 MM, 1 MM PITCH, FBGA-672
CategoryProgrammable logic devices    Programmable logic   
File Size4MB,279 Pages
ManufacturerIntel
Websitehttp://www.intel.com/
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EP1SGX40DF672I5ES Overview

Field Programmable Gate Array, CMOS, PBGA672, 27 X 27 MM, 1 MM PITCH, FBGA-672

EP1SGX40DF672I5ES Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerIntel
package instruction27 X 27 MM, 1 MM PITCH, FBGA-672
Reach Compliance Codecompliant
JESD-30 codeS-PBGA-B672
JESD-609 codee0
length27 mm
Number of terminals672
Package body materialPLASTIC/EPOXY
encapsulated codeBGA
Package shapeSQUARE
Package formGRID ARRAY
Peak Reflow Temperature (Celsius)220
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height3.5 mm
Maximum supply voltage1.575 V
Minimum supply voltage1.425 V
Nominal supply voltage1.5 V
surface mountYES
technologyCMOS
Terminal surfaceTIN LEAD
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
width27 mm
Section I. Stratix GX
Device Family Data Sheet
This section provides the data sheet specifications for Stratix
®
GX
devices. It contains feature definitions of the internal architecture,
configuration information, testing information, DC operating conditions,
and AC timing parameters.
This section includes the following chapters:
Chapter 1, Introduction to the Stratix GX Device Data Sheet
Chapter 2, Stratix GX Transceivers
Chapter 3, Source-Synchronous Signaling With DPA
Chapter 4, Stratix GX Architecture
Chapter 5, Configuration & Testing
Chapter 6, DC & Switching Characteristics
Chapter 7, Reference & Ordering Information
Revision History
The table below shows the revision history for
Chapters 1
through
7.
Chapter(s)
1
2
3
4
5
6
7
Date / Version
February 2005, v1.0
February 2005, v1.0
August 2005, v1.1
February 2005, v1.0
February 2005, v1.0
August 2005, v1.1
February 2005, v1.0
Changes Made
Initial Release.
Initial Release.
Added Note (3) to Figure 3-7.
Initial Release.
Initial Release.
Updated Tables 6-7 and 6-50.
Initial Release.
Altera Corporation
Section I–1
Preliminary
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