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ICS84324EMLFT

Description
Clock Generator, 125MHz, PDSO24, 7.50 X 15.33 MM, 2.30 MM HEIGHT, MS-013, MO-119, SOIC-24
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size180KB,14 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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ICS84324EMLFT Overview

Clock Generator, 125MHz, PDSO24, 7.50 X 15.33 MM, 2.30 MM HEIGHT, MS-013, MO-119, SOIC-24

ICS84324EMLFT Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSOIC
package instructionSOP,
Contacts24
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeR-PDSO-G24
JESD-609 codee3
length15.525 mm
Number of terminals24
Maximum operating temperature70 °C
Minimum operating temperature
Maximum output clock frequency125 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Master clock/crystal nominal frequency25.5 MHz
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER

ICS84324EMLFT Preview

PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
F
EATURES
6 differential 3.3V LVPECL outputs
Crystal oscillator interface
Output frequency range: 53.125MHz to 125MHz
Crystal input frequency: 25MHz and 25.5MHz
RMS phase jitter at 106.25MHz, using a 25.5MHz crystal
(637KHz to 10Mhz): 2.69ps
Phase noise:
Offset
Noise Power
100Hz ................. -96 dBc/Hz
1KHz ................. -115 dBc/Hz
10KHz ................. -125 dBc/Hz
100KHz ................. -127 dBc/Hz
3.3V supply voltage
0°C to 70°C ambient operating temperature
Industrial termperature information available upon request
G
ENERAL
D
ESCRIPTION
The ICS84324 is a Crystal-to-3.3V LVPECL Fre-
quency Synthesizer with Fanout Buffer and a mem-
HiPerClockS™
ber of the HiPerClockS™ family of High Performance
Clock Solutions from ICS. Output frequency can be
programmed using frequency select pins. The low
phase noise characteristics of the ICS84324 make it an ideal clock
source for Fibre Channel 1 and Gigabit Ethernet applications.
,&6
F
UNCTION
T
ABLE
Inputs
MR
1
0
0
0
0
F_SEL1
X
0
0
1
1
F_SEL0
X
0
1
0
1
25.5MHz
25.5MHz
25MHz
25MHz
XTAL
Output Frequency
F_OUT
LOW
53.125MHz
106.25MHz
62.5MHz
125MHz
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CCO
F_SEL0
F_SEL1
MR
XTAL1
XTAL2
V
EE
V
CCA
V
CC
PLL_SEL
V
EE
V
CCO
XTAL1
OSC
XTAL2
0
1
6
Output
Divider
PLL
/
6
/
Q0:Q5
nQ0:nQ5
Feedback
Divider
ICS84324
24-Lead, 300-MIL SOIC
7.5mm x 15.33mm x 2.3mm body package
M Package
Top View
F_SEL1
MR
PLL_SEL
F_SEL0
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
84324EM
www.icst.com/products/hiperclocks.html
1
REV. A SEPTEMBER 18, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
Type
Output
Output
Output
Output
Output
Output
Power
Power
Description
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Output supply pins.
Core supply pin.
Negative supply pins.
Input
Power
Input
Input
Input
Input
Pullup
Selects between the PLL and cr ystal inputs as the input to the dividers.
When HIGH, selects PLL. When LOW, selects XTAL1, XTAL2.
LVCMOS / LVTTL interface levels.
Analog supply pin.
Cr ystal oscillator interface. XTAL1 is the input. XTAL2 is the output.
Active High Master Reset. When logic HIGH, the internal dividers are
reset causing the true outputs Qx to go low and the inver ted outputs
Pulldown
nQx to go high. When logic LOW, the internal dividers and the outputs
are enabled. LVCMOS / LVTTL interface levels.
Pulldown Feedback frequency select pin. LVCMOS / LVTTL interface levels.
Pullup
Output frequency select pin. LVCMOS / LVTTL interface levels.
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 2
3, 4
5, 6
7, 8
9, 10
11, 12
13, 24
16
14, 18
15
17
19, 20
21
22
23
Name
Q0, nQ0
Q1, nQ1
Q2, nQ2
Q3, nQ3
Q4, nQ4
Q5, nQ5
V
CCO
V
CC
V
EE
PLL_SEL
V
CCA
XTAL2, XTAL1
MR
F_SEL1
F_SEL0
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
K
W
pF
K
W
84324EM
www.icst.com/products/hiperclocks.html
2
REV. A SEPTEMBER 18, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
50°C/W (0 lfpm)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
CC
V
CCA
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
135
20
Maximum
3.465
3.465
Units
V
V
mA
mA
T
ABLE
3B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
PLL_SEL, MR,
F_SEL0, F_SEL1
PLL_SEL, MR,
F_SEL0, F_SEL1
MR, F_SEL1
PLL_SEL, F_SEL0
MR, F_SEL1
PLL_SEL, F_SEL0
Test Conditions
Minimum
2
-0.3
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
V
CC
= 3.465V, V
IN
= 0V
-5
-150
Typical
Maximum
V
CC
+ 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
T
ABLE
3C. LVPECL DC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO
- 1.4
V
CCO
- 2.0
0.6
Typical
Maximum
V
CCO
- 1.0
V
CCO
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
W
to V
CCO
- 2V.
84324EM
www.icst.com/products/hiperclocks.html
3
REV. A SEPTEMBER 18, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
Test Conditions
Minimum
25
Typical Maximum
25.5
50
7
Units
MHz
pF
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Fundamental
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= V
CCA
= V
CCO
= 3.3V±5%, T
A
= 0°C
TO
70°C
Symbol Parameter
F
OUT
Output Frequency
Output Skew; NOTE 1, 2
Output Rise Time
Output Fall Time
Output Duty Cycle
Output Pulse Width
t
PERIOD
/2 - TBD
20% to 80%
20% to 80%
200
200
50
t
PERIOD
/2 + TBD
1
Test Conditions
Minimum
53.125
TBD
650
650
Typical
Maximum
125
Units
MHz
ps
ps
ps
%
ps
ms
t
sk(o)
t
R
t
F
odc
t
PW
PLL Lock Time
t
LOCK
See Parameter Measurement Information section.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V
CCO
/2.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
84324EM
www.icst.com/products/hiperclocks.html
4
REV. A SEPTEMBER 18, 2003
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS84324
C
RYSTAL
-
TO
-3.3V LVPECL
F
REQUENCY
S
YNTHESIZER
W
ITH
F
ANOUT
B
UFFER
T
YPICAL
P
HASE
N
OISE AT
106.25MH
Z
U
SING A
25.5MH
Z
Q
UARTZ
C
RYSTAL
0
-10
-20
-30
-40
-50
-60
Mode
Jitter
Source
Process Result
10.000 Hz
40.000M Hz
106.250M Hz
Start Freq.
Stop Freq.
Freq. carrier
Noise only
sec. rms
Execute
Plot
-70
Integral
2.69p
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
10
100
1k
10k
100k
1M
10M
100M
637KHz to 10MHz, 2.69ps
84324EM
www.icst.com/products/hiperclocks.html
5
REV. A SEPTEMBER 18, 2003

ICS84324EMLFT Related Products

ICS84324EMLFT ICS84324EMLF
Description Clock Generator, 125MHz, PDSO24, 7.50 X 15.33 MM, 2.30 MM HEIGHT, MS-013, MO-119, SOIC-24 Clock Generator, 125MHz, PDSO24, 7.50 X 15.33 MM, 2.30 MM HEIGHT, MS-013, MO-119, SOIC-24
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code SOIC SOIC
package instruction SOP, SOP,
Contacts 24 24
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
JESD-30 code R-PDSO-G24 R-PDSO-G24
JESD-609 code e3 e3
length 15.525 mm 15.525 mm
Number of terminals 24 24
Maximum operating temperature 70 °C 70 °C
Maximum output clock frequency 125 MHz 125 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260
Master clock/crystal nominal frequency 25.5 MHz 25.5 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 2.65 mm 2.65 mm
Maximum supply voltage 3.465 V 3.465 V
Minimum supply voltage 3.135 V 3.135 V
Nominal supply voltage 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn)
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 7.5 mm 7.5 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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