D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
TPS2383B
www.ti.com
SLUS565G – JULY 2003 – REVISED AUGUST 2005
OCTAL POWER SOURCEING EQUIPMENT
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Compliant to Power Over Ethernet IEEE
802.3af Standard
Two-Point 25-kΩ Resistor Discovery
Capacitive Detection for Non-Compliant
Legacy Loads
Power Classification
Controlled di/dt Ramp Power-Up and
Power-Down for EMI Reduction
Current Management for Charging Powered
Device Bulk Capacitance
Electronic Circuit Breaker
Fault detection
Input Undervoltage Lockout (UVLO)
Load Overcurrent and Undercurrent Detection
12-Bit Port Current and Voltage Acquisition
Standard Slave I
2
C Serial Interface
5-Bit Serial Address Selectability
Discovery and/or Classification Bypass
•
•
•
•
•
Modes Selectable Via RegisteR
Opto-Coupler Compatible SDA and SCL Lines
for System Ground Isolation
Dual Color LED Driver for Port Status
Hardware FAULT Interrupt
APPLICATIONS
PoE Switches
Mid-Span Injectors
DESCRIPTION
The TPS2383B is a power sourcing equipment power
manager (PSEPM) that are compliant to the
power-over-ethernet (PoE) IEEE 802.3af Standard. A
PSEPM port can discover, classify and deliver power
to a powered device (PD) capable of accepting PoE
twisted pair cable. The TPS2383B is fully
programmable by the user. This allows for the detec-
tion and powering of both fully compliant 802.3
devices as well as custom detection of legacy de-
vices.
APPLICATION DIAGRAM
SWITCH/HUB
CT Choke
TX
2
CT Choke
RX
6
RJ−45
w/grn
1
grn
RJ−45
w/grn
1
grn
POWERED DTR
CT Choke
RX
2
CT Choke
TX
6
3
w/org
w/org
3
org
org
4
PPTC Fuse
TPS2383
PSE P
(1 Port)
N
V48
G
RS
5
blue
blue
4
w/blue
w/blue
5
7
w/brn
w/brn
7
PD
Signature
8
PD
DC/DC
Supply
8
568A
brn
brn
GND
568A
Up to 350 feet of category 5 cable
RG
Optically Coupled
I2C Serial Bus
+
48−V
Supply
−
MSP430
Controller
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2005, Texas Instruments Incorporated
TPS2383B
www.ti.com
SLUS565G – JULY 2003 – REVISED AUGUST 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION (CONTINUED)
The TPS2383B PSEPM can individually manage power for up to eight ethernet ports. All operations of the
TPS2383B are controlled through register read and write operations over a standard (slave) I
2
C serial interface.
The TPS2383B has dual SDA lines to allow easy application of opto-coupler circuitry to maintain ethernet port
isolation when a ground based controller is used. Each TPS2383B has five selection pins making it possible to
address up to 32 devices on the I
2
C bus and allows individual control and monitoring of up to 256 ethernet ports
from a single master I
2
C controller. Per-port write registers initiate and manipulate the flow of the discovery,
classification, and power-up states while the read registers contain status information of the enable process,
faults, classification value, and real time port operating current and voltage. Per-port status LED drivers are
provided which can be manually controlled through the serial I/O.
The TPS2383B is available in a full function 64-pin LQFP.
External N-channel MOSFETs switch port power. High-voltage (HV) gate drive ensures that these FETs are fully
enhanced, resulting in lower power dissipation and enabling the use of lower costs FETs. The TPS2383B
generates its HV gate supply from the 48-V port power, simplifying system power supply design. An external
3.3-V digital supply is also used. This supply can be active when 48-V power is not present which allows the user
to access the part through the serial I/O in this case. A 5-V analog supply is used to power port LEDs and
internal analog functions. Due to the very low quiescent current, both the 3.3-V and 5-V supply can be generated
from the 48-V power bus with minimal external components. An internal power-on-reset (POR) circuit with an
ORed external input pin resets all registers positions to a known safe state upon power up.
ORDERING INFORMATION
T
A
–40°C to 85°C
(1)
PACKAGE DEVICES
(1)
LQFP-64 (PM)
TPS2383BPM
The PM package is available taped and reeled. Add R suffix to
device type (e.g.TPS2383BPMR) to order quantities of 2,500
devices per reel.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
TPS2383B
UNITS
V48, 1P, 2P, 3P, 4P, 5P, 6P, 7P, 8P, 1N, 2N, 3N, 4N, 5N, 6N, 7N, 8N
1RS, 2RS, 3RS, 4RS, 5RS, 6RS, 7RS, 8RS, 1G, 2G, 3G, 4G, 5G, 6G, 7G,
8G, V10
V
CC
Input voltage range
VL
V5
SCL_I, SDA_I, SDA_O, INTB, A1, A2, A3, A4, A5, EN, PORB
T
stg
T
J
T
sol
(1)
Storage temperature
Operating tempera-
ture
Lead temperature
1,6 mm (1/16 inch) from case for 10 seconds
–0.5 to 80 V
–0.5 to 12 V
–0.5 to 3.9 V
–0.5 to 6 V
–0.5 to 6V
–55 to 150°C
–40 to 125°C
260°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages
are with respect to GND. Currents are positive into and negative out of, the specified terminal.
2
TPS2383B
www.ti.com
SLUS565G – JULY 2003 – REVISED AUGUST 2005
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
V
V48
T
a
Input voltage
Operating ambient temperature
44
-40
NOM
48
MAX
57
85
UNIT
V
°C
ELECTROSTATIC DISCHARGE (ESD) PROTECTION
MAX
Human body model
CDM
Machine model
1.5
1
0.2
kV
UNIT
OPERATING TEMPERATURE RANGE
PACKAGE
θ
jc
θ
ja
T
A
≤
25°C
POWER RATING
1.5 W
DERATING
FACTOR
ABOVE TA = 25°C
15.4 mW/°C
T
A
= 85°C
POWER RATING
615 mW
LQFP–64
9°C/W
65°C/W
ELECTRICAL CHARACTERISTICS
V
V48
= 48 V, R
T
= 120 kΩ, –40°C to 85°C, and T
A
= T
J
(unless otherwise noted)
PARAMETER
POWER SUPPLIES
V48
V5
VL
V10
Quiescent current
Quiescent current
Quiescent current
Internal analog supply
Internal reference
(1)
Input UVLO
Internal POR timeout (
I2
C)
Internal POR timeout (state
machine)
LED OUTPUTS
High-level output voltage,
L1 through L8
Low-level output voltage,
L1 through L8
Tri–state leakage
(1)
ANALOG CIRCUITS – PORT VOLTAGE CONTROL LOOP
nP to nN
Input resistance
Classification voltage
Discovery voltage, high
Discovery voltage, low
Loop power supply feedthru loop control range C
(1)
Discovery short-circuit current
Port output, undervoltage
Port output, overvoltage
40
56.0
42
59.5
A/B select = B
480
15.5
7.5
3.5
800
17.5
8.8
4.4
1.5
3
44
63.0
1280
20.5
9.5
5.5
mV
mA
V
V
kΩ
I
SRC
= 5 mA
I
SRC
= 5 mA
0.1
4
0.75
V
µA
After all supplies are good (8 CLK periods)
After all supplies are good (65536 CLK periods)
Off mode (all ports)
Powered mode (all ports)
Powered mode (all ports)
Powered mode (all ports)
V
V5
= 5 V
V
VL
= 3.3 V
9.75
2.475
3
5
3
0.28
10.50
2.500
30
8
65536
CLKs
5
10
15
4
11.50
2.525
38
V
mA
TEST CONDITIONS
MIN
TYP
MAX
UNIT
(1)
Ensured by design. Not production tested.
3
TPS2383B
www.ti.com
SLUS565G – JULY 2003 – REVISED AUGUST 2005
ELECTRICAL CHARACTERISTICS (continued)
V
V48
= 48 V, R
T
= 120 kΩ, –40°C to 85°C, and T
A
= T
J
(unless otherwise noted)
PARAMETER
ClassLimit1 = 0,
Classification current limit
ClassLimit1 = 1,
ClassLimit1 = 0,
ClassLimit1 = 1,
N-CHANNEL MOSFET GATE CONTROL
Gate turn-off MOSFET R
DS(on)
Maximum gate voltage
Gate turn-off timer from
UV/OV fault
UV/OV spike timer, power
quality warning
(1)
Gate turn-off timer from
overload fault
LOW-SIDE CURRENT-SENSE
Overload threshold voltage
Current limit threshold volt-
age
CINT
CINT
CINT
CR
nRS
Maximum swing
Reset voltage
Internal pull-up current
Maximum swing
Input leakage
A/D resistive scaling
Port-to-port resistance vari-
ation
A/D classificatin scaling
(2)
A/D load current
scaling
(2)
A/D load voltage scaling
(2)
A/D load current conversion I
LOAD
= 50 mA, R
RS
= 0.5
Ω
I
LOAD
= 300 mA, R
RS
= 0.5
Ω
A/D port voltage conversion
DIGITAL I/O
SCL,
SDA_I, A1
through
A5, EN,
PORB
SCL,
SDA_I
Logic input threshold volt-
age
1.5
V
V
PORT
= 5 V
V
PORT
= 45 V
R
RD
= 1 kΩ
Referenced to port #1
R
RS
= 0.5
Ω
R
RS
= 0.5
Ω
-5%
VCINT < 1.25 V,
A/D inputs = –100 mV
175
200
9
10
850
4.5
10
72
0%
35
4.72
33.6
236
1416
168
1512
count
5%
counta/m
A
count/V
6.0
187
213
200
225
11
100
mV
V
mV
nA
V
µA
count/kΩ
After port enabled and ramped up,
(1024 CLK periods)
(256 CLK periods)
(32768 CLK periods)
8
200
10
1024
256
32768
CLKs
12
Ω
V
TEST CONDITIONS
ClassLimit2 = 0
ClassLimit2 = 0
ClassLimit2 = 1
ClassLimit2 = 1
MIN
TYP
160
80
40
20
mA
MAX
UNIT
ANALOG-TO-DIGITAL CONVERTER
Input hysteresis
250
mV
150
50
10
25
µA
kΩ
EN, PORB Input hysteresis
EN, PORB Input pull-down resistance
A0, A1,
A2, A3,
A4, A5
SDA_O
SDA_O
INTB
(2)
4
Pull-up current
Logic high leakage
Logic low output voltage
Logic high leakage
Drain = 6 V
I
SINK
= 3 mA
Drain = 6 V
10
200
10
mV
µA
Ensured by design. Not production tested.
Electronics Design Contest
京公网安备 11010802033920号
EEWORLD
