DPS32M8ANL-55I datasheet, PDF - EEWORLD Datasheet

DPS32M8ANL-55I: DescriptionStandard SRAM, 32KX8, 55ns, CMOS, CDIP28, SIDE BRAZED, DIP-28; Categorystorage storage; File Size199KB，6 Pages; ManufacturerB&B Electronics Manufacturing Company

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DPS32M8ANL-55I Overview

Standard SRAM, 32KX8, 55ns, CMOS, CDIP28, SIDE BRAZED, DIP-28

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	B&B Electronics Manufacturing Company
Parts packaging code	DIP
package instruction	DIP, DIP28,.6
Contacts	28
Reach Compliance Code	unknown
ECCN code	EAR99
Maximum access time	55 ns
I/O type	COMMON
JESD-30 code	R-CDIP-T28
JESD-609 code	e0
length	35.56 mm
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of ports	1
Number of terminals	28
word count	32768 words
character code	32000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	32KX8
Output characteristics	3-STATE
Exportable	YES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP28,.6
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum seat height	4.191 mm
Maximum standby current	0.00035 A
Minimum standby current	2 V
Maximum slew rate	0.16 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
width	15.24 mm

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