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IS62WV10008BLL-70BI

Description
Standard SRAM, 1MX8, 70ns, CMOS, PBGA48, 7.20 X 8.70 MM, MINI, BGA-48
Categorystorage    storage   
File Size56KB，12 Pages
ManufacturerIntegrated Silicon Solution ( ISSI )
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IS62WV10008BLL-70BI Overview

Standard SRAM, 1MX8, 70ns, CMOS, PBGA48, 7.20 X 8.70 MM, MINI, BGA-48

IS62WV10008BLL-70BI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIntegrated Silicon Solution ( ISSI )
Parts packaging codeBGA
package instruction7.20 X 8.70 MM, MINI, BGA-48
Contacts48
Reach Compliance Codecompliant
ECCN code3A991.B.2.A
Maximum access time70 ns
JESD-30 codeR-PBGA-B48
JESD-609 codee0
length8.7 mm
memory density8388608 bit
Memory IC TypeSTANDARD SRAM
memory width8
Humidity sensitivity level3
Number of functions1
Number of terminals48
word count1048576 words
character code1000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize1MX8
Package body materialPLASTIC/EPOXY
encapsulated codeLFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height1.3 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formBALL
Terminal pitch0.75 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.2 mm

IS62WV10008BLL-70BI Preview

IS62WV10008ALL
IS62WV10008BLL
1M x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation
– 36 mW (typical) operating
– 9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
– 1.65V--2.2V V
CC
(62WV10008ALL)
– 2.5V--3.6V V
CC
(62WV10008BLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial temperature available
ISSI
DESCRIPTION
®
PRELIMINARY INFORMATION
FEBRUARY 2002
The
ISSI
IS62WV10008ALL/ IS62WV10008BLL are high-
speed, 8M bit static RAMs organized as 1M words by 8 bits.
It is fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) or when
CS1
is LOW, CS2 is HIGH, the device
assumes a standby mode at which the power dissipation
can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory.
The IS62WV10008ALL and IS62WV10008BLL are packged
in the JEDEC standard 48-pin mini BGA (7.2mm x 8.7mm)
and 44-Pin TSOP (TYPE II).
FUNCTIONAL BLOCK DIAGRAM
A0-A19
DECODER
1M x 8
MEMORY ARRAY
VCC
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CS2
CS1
OE
WE
CONTROL
CIRCUIT
This document contains PRELIMINARY INFORMATION data. ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the
best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
02/28/02
1
IS62WV10008ALL,
IS62WV10008BLL
ISSI
®
PIN DESCRIPTIONS
A0-A19
CS1
CS2
OE
WE
I/O0-I/O7
NC
Vcc
GND
Address Inputs
Chip Enable 1 Input
Chip Enable 2 Input
Output Enable Input
Write Enable Input
Input/Output
No Connection
Power
Ground
PIN CONFIGURATION
36-pin mini BGA (B) (7.2mm x 8.7mm)
44-pin TSOP (Type II)
1
A
B
C
D
E
F
G
H
NC
2
OE
3
A
0
4
A
1
5
A
2
6
CS
2
NC
NC
A
3
A
4
CS1
NC
I/O
0
NC
A
5
A
6
NC
I/O
4
GND
I/O
1
A
17
A
7
I/O
5
V
CC
V
CC
I/O
2
NC
A
16
I/O
6
V
SS
I/O
3
NC
A
14
A
15
NC
I/O
7
NC
NC
A
12
A
13
WE
NC
A
18
A
8
A
9
A
10
A
11
A
19
A4
A3
A2
A1
A0
CS1
NC
NC
I/O0
I/O1
Vcc
GND
I/O2
I/O3
NC
NC
WE
A19
A18
A17
A16
A15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
CS2
A8
NC
NC
I/O7
I/O6
GND
Vcc
I/O5
I/O4
NC
NC
A9
A10
A11
A12
A13
A14
2
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
02/28/02
IS62WV10008ALL,
IS62WV10008BLL
ISSI
IS62WV10008BLL
2.5V - 3.6V
2.5V - 3.6V
®
OPERATING RANGE (Vcc)
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
IS62WV10008ALL
1.65V - 2.2V
1.65V - 2.2V
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
BIAS
V
CC
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Temperature Under Bias
Vcc Related to GND
Storage Temperature
Power Dissipation
Value
–0.2 to Vcc+0.3
–40 to +85
–0.2 to +3.8
–65 to +150
1.0
Unit
V
°C
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
OH
V
OL
V
IH
V
IL(1)
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
GND
≤
V
IN
≤
V
CC
GND
≤
V
OUT
≤
V
CC
, Outputs Disabled
Test Conditions
I
OH
= -0.1 mA
I
OH
= -1 mA
I
OL
= 0.1 mA
I
OL
= 2.1 mA
Vcc
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
Min.
1.4
2.2
—
—
1.4
2.2
–0.2
–0.2
–1
–1
Max.
—
—
0.2
0.4
V
CC
+ 0.2
V
CC
+ 0.3
0.4
0.6
1
1
Unit
V
V
V
V
V
V
V
V
µA
µA
Notes:
1. V
IL
(min.) = –1.0V for pulse width less than 10 ns.
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
02/28/02
3
IS62WV10008ALL,
IS62WV10008BLL
ISSI
Max.
8
10
Unit
pF
pF
®
CAPACITANCE
(1)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
62WV10008ALL
(Unit)
0.4V to Vcc-0.2
5 ns
V
REF
See Figures 1 and 2
62WV10008BLL
(Unit)
0.4 to 2.2V
5ns
V
REF
See Figures 1 and 2
1.65-2.2V
R1(Ω)
R2(Ω)
V
REF
V
TM
3070
3150
0.9V
1.8V
2.5V - 3.6V
3070
3150
1.5V
2.8V
AC TEST LOADS
R1
VTM
R1
VTM
OUTPUT
30 pF
Including
jig and
scope
R2
OUTPUT
5 pF
Including
jig and
scope
R2
Figure 1
Figure 2
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
02/28/02
IS62WV10008ALL,
IS62WV10008BLL
ISSI
®
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
62WV10008ALL
Symbol Parameter
I
CC
I
CC
1
I
SB
1
Vcc Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
CC
= Max.,
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
CC
= Max.,
Com.
I
OUT
= 0 mA, f = 0
Ind.
V
CC
= Max.,
Com.
V
IN
= V
IH
or V
IL
Ind.
CS1
= V
IH
, CS2 = V
IL
,
f = 1 MH
Z
V
CC
= Max.,
CS1
≥
V
CC
– 0.2V,
CS2
≤
0.2V,
V
IN
≥
V
CC
– 0.2V, or
V
IN
≤
0.2V, f = 0
Com.
Ind.
Max. Max.
45
55
25
20
25
20
3
3
3
3
0.3
0.3
0.3
0.3
Max.
70
15
15
3
3
0.3
0.3
Unit
mA
mA
mA
I
SB
2
CMOS Standby
Current (CMOS Inputs)
15
15
15
15
15
15
µA
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
62WV10008BLL
Symbol Parameter
I
CC
I
CC
1
I
SB
1
Vcc Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
CC
= Max.,
Com.
I
OUT
= 0 mA, f = f
MAX
Ind.
V
CC
= Max.,
Com.
I
OUT
= 0 mA, f = 0
Ind.
V
CC
= Max.,
Com.
V
IN
= V
IH
or V
IL
Ind.
CS1
= V
IH
, CS2 = V
IL
,
f = 1 MH
Z
V
CC
= Max.,
CS1
≥
V
CC
– 0.2V,
CS2
≤
0.2V,
V
IN
≥
V
CC
– 0.2V, or
V
IN
≤
0.2V, f = 0
Com.
Ind.
Max. Max.
45
55
35
30
40
35
3
3
3
3
0.3
0.3
0.3
0.3
Max.
70
25
30
3
3
0.3
0.3
Unit
mA
mA
mA
I
SB
2
CMOS Standby
Current (CMOS Inputs)
20
20
20
20
20
20
µA
Integrated Silicon Solution, Inc. — 1-800-379-4774
PRELIMINARY INFORMATION Rev. 00A
02/28/02
5
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IS62WV10008BLL-70BI Related Products

IS62WV10008BLL-70BI IS62WV10008ALL-70T IS62WV10008BLL-55BI
Description Standard SRAM, 1MX8, 70ns, CMOS, PBGA48, 7.20 X 8.70 MM, MINI, BGA-48 Standard SRAM, 1MX8, 70ns, CMOS, PDSO44, TSOP2-44 Standard SRAM, 1MX8, 55ns, CMOS, PBGA48, 7.20 X 8.70 MM, MINI, BGA-48
Is it lead-free? Contains lead Contains lead Contains lead
Is it Rohs certified? incompatible incompatible incompatible
Maker Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI ) Integrated Silicon Solution ( ISSI )
Parts packaging code BGA TSOP2 BGA
package instruction 7.20 X 8.70 MM, MINI, BGA-48 TSOP2-44 7.20 X 8.70 MM, MINI, BGA-48
Contacts 48 44 48
Reach Compliance Code compliant compliant compliant
ECCN code 3A991.B.2.A 3A991.B.2.A 3A991.B.2.A
Maximum access time 70 ns 70 ns 55 ns
JESD-30 code R-PBGA-B48 R-PDSO-G44 R-PBGA-B48
JESD-609 code e0 e0 e0
length 8.7 mm 18.41 mm 8.7 mm
memory density 8388608 bit 8388608 bit 8388608 bit
Memory IC Type STANDARD SRAM STANDARD SRAM STANDARD SRAM
memory width 8 8 8
Humidity sensitivity level 3 3 3
Number of functions 1 1 1
Number of terminals 48 44 48
word count 1048576 words 1048576 words 1048576 words
character code 1000000 1000000 1000000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 70 °C 85 °C
Minimum operating temperature -40 °C - -40 °C
organize 1MX8 1MX8 1MX8
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LFBGA TSOP2 LFBGA
Package shape RECTANGULAR RECTANGULAR RECTANGULAR
Package form GRID ARRAY, LOW PROFILE, FINE PITCH SMALL OUTLINE, THIN PROFILE GRID ARRAY, LOW PROFILE, FINE PITCH
Parallel/Serial PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) NOT SPECIFIED 240 NOT SPECIFIED
Certification status Not Qualified Not Qualified Not Qualified
Maximum seat height 1.3 mm 1.2 mm 1.3 mm
Maximum supply voltage (Vsup) 3.6 V 2.2 V 3.6 V
Minimum supply voltage (Vsup) 2.5 V 1.65 V 2.5 V
surface mount YES YES YES
technology CMOS CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form BALL GULL WING BALL
Terminal pitch 0.75 mm 0.8 mm 0.75 mm
Terminal location BOTTOM DUAL BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED 30 NOT SPECIFIED
width 7.2 mm 10.16 mm 7.2 mm

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