EEWORLDEEWORLDEEWORLD

Part Number

Search

SSM2163S-REEL

Description
IC SPECIALTY ANALOG CIRCUIT, PDSO28, SOIC-28, Analog IC:Other
CategoryAnalog mixed-signal IC    The signal circuit   
File Size272KB,16 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric View All

SSM2163S-REEL Overview

IC SPECIALTY ANALOG CIRCUIT, PDSO28, SOIC-28, Analog IC:Other

SSM2163S-REEL Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerADI
Parts packaging codeSOIC
package instructionSOIC-28
Contacts28
Reach Compliance Codeunknown
ECCN codeEAR99
Analog Integrated Circuits - Other TypesANALOG CIRCUIT
JESD-30 codeR-PDSO-G28
JESD-609 codee0
length17.9 mm
Maximum negative supply voltage (Vsup)-7 V
Negative supply voltage minimum (Vsup)-4 V
Nominal Negative Supply Voltage (Vsup)-5 V
Number of terminals28
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP28,.4
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply+-5 V
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)7 V
Minimum supply voltage (Vsup)4 V
Nominal supply voltage (Vsup)5 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.5 mm

SSM2163S-REEL Preview

a
FEATURES
Each of 8 Inputs Can Be Assigned to Either or Both
Outputs
Voltage Inputs and Outputs – No Need For External
Amplifiers
Each Input Provides 63 dB of Attenuation in 1 dB Steps,
Plus Mute
–82 dBu Signal-to-Noise Ratio (0 dBu = 0.775 V rms)
+10 dBu of Headroom
0.007% THD+N (Unity Gain, @ 1 kHz, 0 dBu)
Power-Up/System Mute Feature
Industry-Standard 3-Wire Serial Interface
Data Out Terminal Permits Daisy Chaining of Multiple
SSM2163s
Single or Dual Supply Operation
28-Pin Plastic DIP and SOIC Package
APPLICATIONS
Multimedia System Mixing
Audio Mixing Consoles
Broadcast Equipment
Intercom/Paging Systems
Musical Instruments
V
IN1
DCA
DCA
Digitally Controlled
8 2 Audio Mixer
SSM2163
SIMPLIFIED BLOCK DIAGRAM
SSM2163
V
IN2
VOLTAGE
REFERENCE
GENERATOR
V
IN3
DCA
V
CC
V
EE
ACOM
AGND
V
IN4
DCA
V
OUTL
V
IN5
DCA
OUTPUT
SWITCHING
NETWORK
V
OUTR
V
IN6
DCA
SYSTEM MUTE
DATA OUT
SHIFT
REGISTER
AND
ADDRESS
DECODER
CLK
DATA
LD
WRITE
DGND
V
DD
V
SS
V
IN7
DCA
GENERAL DESCRIPTION
V
IN8
DCA
The SSM2163 provides eight audio inputs, each of which can
be mixed under digital control to a stereo output. Each input
channel can be attenuated up to 63 dB in 1 dB intervals, plus
fully muted. Additionally, any input can be assigned to either or
both outputs. A standard 3-wire serial interface is employed,
plus a Data Out terminal to facilitate daisy chaining of multiple
mixer ICs. No external components are required for normal
operation.
Excellent audio performance is attained. The SSM2163 has a
signal-to-noise ratio of –82 dBu (0 dBu = 0.775 V rms), with
10 dBu of headroom resulting in total dynamic range of 92 dBu.
Total harmonic distortion plus noise is 0.007% at 1 kHz with all
levels set at unity gain.
DCA: DIGITALLY CONTROLLED ATTENUATOR
The SSM2163 can be operated from single (+5 V to +14 V) or
dual (± 4 V to
±
7 V) supplies, and is housed in 28-pin plastic
DIP and SOIC packages.
The SSM2163 is an ideal companion product to the Analog
Devices family of stereo codecs in high performance multi-
media systems requiring mixing of multiple signals.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
SSM2163–SPECIFICATIONS
5 V, A = 0 dB, V = 0 dBu = 0.775 V rms, f
(V =
ELECTRICAL SPECIFICATIONS
Parameter
AUDIO PERFORMANCE
Noise
Headroom
Total Harmonic Distortion Plus Noise
S
V
IN
= 250 kHz, R
L
= 100 k ,
–40 C < T
A
< +85 C, unless otherwise noted. Typical specifications apply at T
A
= +25 C.)
Min
Typ
–82
+10
0.007
0.02
0.035
7
10
1.0
0.03
Max
Units
dBu
dBu
%
%
%
kΩ
dB
1.0
dB
dB
AUDIO
= 1 kHz, f
CLK
Conditions
V
IN
= GND, 20 kHz Bandwidth
Clip Point = 1% THD+N
2nd and 3rd Harmonics Only
A
V
= 0 dB
A
V
= –20 dB
A
V
= 0 dB, V
S
= +5 V, Single Supply
ANALOG INPUT
Input Impedance
VOLUME CONTROL
Step Size
Gain Error
15
Gain Match Error
Relative to Same Channel
0 dB Attenuation
–20 dB Attenuation
–40 dB Attenuation
Channel-to-Channel; Same Level Setting
0 dB Attenuation
–20 dB Attenuation
–40 dB
0.1
0.1
0.25
0.01
0.05
0.4
64
15
500
4
5000
50
Mute Attenuation
ANALOG OUTPUT
Output Impedance
Output Current
Minimum Resistive Load
Maximum Capacitive Drive
Offset Voltage
CONTROL SECTION
Logic Input LO
Logic Input HI
Logic Input Current
Logic Out LO
Logic Out HI
Timing Characteristics
REFERENCE (ACOM)
Output Voltage
Output Impedance
Load Regulation
POWER SUPPLIES
Supply Voltage Range
Supply Current
Power Supply Rejection Ratio
Specifications subject to change without notice.
dB
dB
dB
dB
µA
kΩ
pF
mV
0.8
V
V
µA
V
V
THD = 1%
Channel Muted
2.0
Logic LO or HI
I
OUT
= 0.2 mA
I
OUT
= 0.2 mA
See Timing Diagram
V
S
= +10 V (Single Supply)
–0.5 mA
I
L
+0.5 mA (Single Supply)
Dual Supply
Single Supply
V
S
= +10 V (Single Supply)
Delta Gain
±
4
+5
8
0.005
1
0.4
2.4
4.7
5.0
10
0.2
5.3
V
%
V
V
mA
dB/V
±
7
+14
15
–2–
REV. 0
SSM2163
Timing Description
Timing
Symbol
t
CL
t
CH
t
DS
t
DH
t
CW
t
WC
t
LW
t
WL
t
L
t
W3
t
PD
Description
Input Clock Pulse Width
Input Clock Pulse Width
Data Setup Time
Data Hold Time
Positive CLK Edge to End of Write
Write to Clock Setup Time
End of Load Pulse to Next Write
End of Write to Start of Load
Load Pulse Width
Load Pulse Width (3-Wire Mode)
Propagation Delay from Rising
Clock to SDO Transition
(R
L
= 220 kΩ, C
L
= 20 pF)
Min
50
50
25
35
25
35
20
20
250
250
10
Typ
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
80
160
NOTES
1. An idle HI (CLK-HI) or idle LO (CLK-LO) clock may be used. Data is latched on the positive
edge.
2. For SPI or microwire three-wire bus operation, tie
LD
to
WRITE
and use
WRITE
pulse to drive
both pins. (This generates an automatic internal
LD
signal.)
3. If an idle HI clock is used, t
CW
and t
WL
are measured from the final negative transition to the idle
state.
4. The first data byte selects an address (MSB HI), and subsequent MSB LO states set gain levels. Re-
fer to the Address/Data Decoding Truth Table.
5. Data must be sent MSB first.
1
CLK
0
1
DATA
0
1
WRITE
&
LOAD
0
D7
D6
D5
D4
D3
D2
D1
D0
t
CL
1
CLK
0
t
CH
t
DS
1
DATA
0
t
DH
t
CW
t
W3
t
WC
1
WRITE
&
LOAD
0
t
PD
1
SDO
0
Figure 1. Three-Wire Mode Timing Diagram
REV. 0
–3–
SSM2163
1
CLK
0
1
DATA
0
1
WRITE
0
1
LD
0
D7
D6
D5
D4
D3
D2
D1
D0
t
CL
1
CLK
0
t
CH
t
DS
1
DATA
0
t
DH
t
CW
1
WRITE
0
t
WC
t
WL
t
L
t
LW
1
LOAD
0
t
PD
1
SDO
0
Figure 2. Four-Wire Mode Timing Diagram
–4–
REV. 0
SSM2163
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage
Dual Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
8 V
Single Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +16 V
Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
V
S
Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
V
S
Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . +300°C
THERMAL CHARACTERISTICS
2
PIN CONFIGURATIONS
Epoxy Plastic DIP (P-Suffix)
and SOIC (S-Suffix)
DGND 1
V
SS
2
DATA OUT 3
V
DD
4
V
IN1
5
NC (SHIELD) 6
28 SYSTEM MUTE
27 DATA IN
26 CLK
25
WRITE
SSM2163
24
LD
TOP VIEW 23 NC (SHIELD)
(Not to Scale)
V
IN3
7
22 V
IN2
21 NC (SHIELD)
20 V
IN4
19 NC (SHIELD)
18 V
IN6
17 AGND
16 V
IN8
15 V
OUTR
NC (SHIELD) 8
V
IN5
9
V
CC
10
V
IN7
11
Thermal Resistance
28-Pin Plastic DIP (SSM2163P)
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
θ
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
28-Pin SOIC (SSM2163S)
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
θ
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TRANSISTOR COUNT
48°C/W
22°C/W
68°C/W
20°C/W
V
EE
12
ACOM 13
V
OUTL
14
Number of Transistors . . . . . . . . . . . . . . . . . . 1711 MOSFETs
447 BJTs
ESD RATINGS
883 (Human Body) Model . . . . . . . . . . . . . . . . . . . . . . 1000 V
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect device reliability.
2
θ
JA
is specified for worst-case conditions, i.e.,
θ
JA
is specified for device in socket
for P-DIP and device soldered in circuit board for SOIC package.
ORDERING GUIDE
Model
SSM2163P
SSM2163S
Temperature
Range
–40°C to +85°C
–40°C to +85°C
Package
Description
Plastic DIP
SOIC
Package
Option
N-28
R-28
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the SSM2163 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
REV. 0
–5–
Qorvo UWB Solution Receives Apple U1 Interoperability Certification
Qorvo today announced that it has achieved MFi certification of its Ultra Wideband solution for interoperability with the Apple U1 chip used in supported iPhone and Apple Watch models.* The Qorvo Ultr...
石榴姐 RF/Wirelessly
When the nrf24l01 module was conducting a communication experiment, the automatic response was unsuccessful. . .
I use NRF24L01 module for communication, and configure PIPE0 for automatic response. Why is there only a very small probability of receiving the automatic response signal (almost zero) during the expe...
longfly RF/Wirelessly
Why is there no news about BYD electric taxis in Shenzhen yet?
Fortunately, there are no reports of technical accidents. According to the normal plan, the next batch of more than 100 similar taxis will also be launched in the market in the near future. However, a...
zhaogztj66 Automotive Electronics
Can't even see the taillights? LED makes car tail lighting safer
In the early 20th century, nighttime driving was extremely dangerous. Drivers were illuminated by kerosene lamps, using hand signals and shouting to tell others what maneuvers to perform, while guessi...
EEWORLD社区 TI Technology Forum
C language essential articles
Why didn’t the upload succeed last time?...
cqwjfb Programming Basics
TIM issues with STM32
Are there TIM2_CH1 and TIM5_ETR in the STM32F103ZET6 chip? Why can't I find them in the manual?...
落日归侠 stm32/stm8

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2415  1049  1884  2577  2863  49  22  38  52  58 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号