X5163S8ZT2 datasheet, PDF - EEWORLD Datasheet

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X5163S8ZT2: Description1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, ROHS COMPLIANT, SOIC-8; CategoryPower/power management The power supply circuit; File Size354KB，21 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/; Environmental Compliance

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X5163S8ZT2 Overview

1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, ROHS COMPLIANT, SOIC-8

X5163S8ZT2 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Renesas Electronics Corporation
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
Other features	RESET THRESHOLD VOLTAGE IS 4.38V
Adjustable threshold	YES
Analog Integrated Circuits - Other Types	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.9022 mm
Humidity sensitivity level	1
Number of channels	1
Number of functions	1
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.7272 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
Temperature level	COMMERCIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	3.9116 mm

X5163S8ZT2 Preview

X5163, X5165

Data Sheet

June 1, 2006

FN8128.3

CPU Supervisor with 16Kbit SPI EEPROM

Description

These devices combine four popular functions, Power-on

Reset Control, Watchdog Timer, Supply Voltage Supervision,

and Block Lock Protect Serial EEPROM Memory in one

package. This combination lowers system cost, reduces

board space requirements, and increases reliability.

Applying power to the device activates the power-on reset

circuit which holds RESET/RESET active for a period of

time. This allows the power supply and oscillator to stabilize

before the processor can execute code.

The Watchdog Timer provides an independent protection

mechanism for microcontrollers. When the microcontroller

fails to restart a timer within a selectable time out interval, the

device activates the RESET/RESET signal. The user selects

the interval from three preset values. Once selected, the

interval does not change, even after cycling the power.

The device’s low V

detection circuitry protects the user’s

system from low voltage conditions, resetting the system when

falls below the minimum V

trip point. RESET/RESET is

asserted until V

returns to proper operating level and

stabilizes. Five industry standard V

TRIP

thresholds are

available, however, Intersil’s unique circuits allow the

threshold to be reprogrammed to meet custom requirements

or to fine-tune the threshold for applications requiring higher

precision.

Features

• Selectable watchdog timer

• Low V

detection and reset assertion

- Five standard reset threshold voltages

- Re-program low V

reset threshold voltage using

special programming sequence

- Reset signal valid to V

= 1V

• Determine watchdog or low voltage reset with a volatile

flag bit

• Long battery life with low power consumption

- <50µA max standby current, watchdog on

- <1µA max standby current, watchdog off

- <400µA max active current during read

• 16kbits of EEPROM

• Built-in inadvertent write protection

- Power-up/power-down protection circuitry

- Protect 0, 1/4, 1/2 or all of EEPROM array with Block

Lock

™

protection

- In-circuit programmable ROM mode

• 2MHz SPI interface modes (0,0 & 1,1)

• Minimize EEPROM programming time

- 32-byte page write mode

- Self-timed write cycle

- 5ms write cycle time (typical)

• 2.7V to 5.5V and 4.5V to 5.5V power supply operation

• Available packages: 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP

• Pb-free plus anneal available (RoHS compliant)

Pinouts

8 Ld SOIC/PDIP

X5163, X5165

CS/WDI

X5163, X5165

RESET/RESET

SCK

14 Ld TSSOP

X5163, X5165

CS/WDI

RESET/RESET

SCK

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

X5163, X5165

Ordering Information

PART NUMBER

RESET

(ACTIVE LOW)

X5163P

X5163PZ (Note)

X5163PI

X5163PIZ (Note)

X5163S8*

PART

MARKING

X5163P

X5163P Z

X5163P I

X5163P Z I

X5163

PART NUMBER

RESET

(ACTIVE HIGH)

X5165P

X5165PZ (Note)

X5165PI

X5165PIZ (Note)

X5165S8*

X5165S8Z*

(Note)

X5165S8I*

X5165S8IZ*

(Note)

X5165V14*

X5165V14Z*

(Note)

X5165V14I*

X5165V14IZ*

(Note)

X5165P-2.7

X5165PZ-2.7

(Note)

X5165PI-2.7

X5165PIZ-2.7

(Note)

X5165S8-2.7*

X5165S8Z-2.7*

(Note)

X5165S8I-2.7*

X5165S8IZ-2.7*

(Note)

X5165V14-2.7*

X5165V14Z-2.7*

(Note)

X5165V14I-2.7*

PART

MARKING

X5165P

X5165P Z

X5165P I

X5165P Z I

X5165

X5165 Z

X5165 I

X5165 Z I

X5165V

X5165V Z

X5165V I

X5165V Z I

X5165P F

X5165P Z F

X5165P G

X5165P Z G

X5165 F

X5165 Z F

X5165 G

X5165 Z G

X5165V F

X5165V Z F

X5165V G

2.7-5.5

2.55-2.7

RANGE

(V)

4.5-5.5

TEMP

TRIP

RANGE RANGE (°C)

4.25-4.5

0 to 70

-40 to 85

0 to 70

-40 to 85

0 to 70

-40 to 85

0 to 70

-40 to 85

0 to 70

-40 to 85

0 to 70

-40 to 85

2.7-5.5

2.85-3.0

0 to 70

-40 to 85

0 to 70

PACKAGE

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld SOIC

(Pb-free)

8 Ld SOIC

(Pb-free)

14 Ld TSSOP

(Pb-free)

14 Ld TSSOP

(Pb-free)

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld SOIC

(Pb-free)

8 Ld SOIC

(Pb-free)

14 Ld TSSOP

(Pb-free)

14 Ld TSSOP

(Pb-free)

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld SOIC

PKG.

DWG. #

MDP0031

MDP0027

M14.173

MDP0031

MDP0027

M14.173

MDP0031

MDP0027

X5163S8Z* (Note) X5163 Z

X5163S8I*

X5163S8IZ*

(Note)

X5163V14*

X5163V14Z*

(Note)

X5163V14I*

X5163V14IZ*

(Note)

X5163P-2.7

X5163PZ-2.7

(Note)

X5163PI-2.7

X5163PIZ-2.7

(Note)

X5163S8-2.7*

X5163S8Z-2.7*

(Note)

X5163S8I-2.7*

X5163S8IZ-2.7*

(Note)

X5163V14-2.7*

X5163V14Z-2.7*

(Note)

X5163V14I-2.7*

X5163V14IZ-2.7*

(Note)

X5163P-2.7A

X5163PZ-2.7A

(Note)

X5163PI-2.7A

X5163PIZ-2.7A

(Note)

X5163S8-2.7A*

X5163 I

X5163 Z I

X5163V

X5163V Z

X5163V I

X5163V Z I

X5163P F

X5163P Z F

X5163P G

X5163P Z G

X5163 F

X5163 Z F

X5163 G

X5163 Z G

X5163V F

X5163V Z F

X5163V G

X5163V Z G

X5163P AN

X5165V14IZ-2.7* X5165V Z G

(Note)

X5165P-2.7A

X5165P AN

X5165P Z AN

X5165P AP

X5165P Z AP

X5165 AN

X5163P Z AN X5165PZ-2.7A

(Note)

X5163P AP

X5165PI-2.7A

X5163P Z AP X5165PIZ-2.7A

(Note)

X5163 AN

X5165S8-2.7A

FN8128.3

June 1, 2006

X5163, X5165

Ordering Information

(Continued)

PART NUMBER

RESET

(ACTIVE LOW)

X5163S8Z-2.7A*

(Note)

X5163S8I-2.7A

X5163S8IZ-2.7A

(Note)

X5163V14-2.7A

X5163V14Z-2.7A

(Note)

X5163V14I-2.7A

PART

MARKING

X5163 Z AN

X5163 AP

X5163 Z AP

X5163V AN

PART NUMBER

RESET

(ACTIVE HIGH)

X5165S8Z-2.7A

(Note)

X5165S8I-2.7A

X5165S8IZ-2.7A

(Note)

X5165V14-2.7A

PART

MARKING

X5165 Z AN

X5165 AP

X5165 Z AP

X5165V AN

RANGE

(V)

2.7-5.5

TEMP

TRIP

RANGE RANGE (°C)

2.85-3.0

0 to 70

-40 to 85

0 to 70

-40 to 85

4.5-5.5

4.5-4.75

0 to 70

-40 to 85

0 to 70

-40 to 85

0 to 70

-40 to 85

PACKAGE

8 Ld SOIC

(Pb-free)

8 Ld SOIC

(Pb-free)

14 Ld TSSOP

(Pb-free)

14 Ld TSSOP

(Pb-free)

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld PDIP

8 Ld PDIP**

(Pb-free)

8 Ld SOIC

(Pb-free)

8 Ld SOIC

(Pb-free)

14 Ld TSSOP

(Pb-free)

14 Ld TSSOP

(Pb-free)

PKG.

DWG. #

MDP0027

M14.173

MDP0031

MDP0027

M14.173

X5163V Z AN X5165V14Z-2.7A X5165V Z AN

(Note)

X5163V AP

X5165V14I-2.7A

X5165V AP

X5163V14IZ-2.7A X5163V Z AP X5165V14IZ-2.7A X5165V Z AP

(Note)

X5163P-4.5A

X5163PZ-4.5A

(Note)

X5163PI-4.5A

X5163PIZ-4.5A

(Note)

X5163S8-4.5A

X5163S8Z-4.5A

(Note)

X5163S8I-4.5A

X5163S8IZ-4.5A

(Note)

X5163V14-4.5A

X5163V14Z-4.5A

(Note)

X5163V14I-4.5A

X5163P AL

X5165P-4.5A

X5165P AL

X5165P Z AL

X5165P AM

X5165P Z AM

X5165 AL

X5165 Z AL

X5165 AM

X5165 Z AM

X5165V AL

X5163P Z AL X5165PZ-4.5A

(Note)

X5163P AM

X5165PI-4.5A

X5163P Z AM X5165PIZ-4.5A

(Note)

X5163 AL

X5163 Z AL

X5163 AM

X5163 Z AM

X5163V AL

X5165S8-4.5A

X5165S8Z-4.5A

(Note)

X5165S8I-4.5A

X5165S8IZ-4.5A

(Note)

X5165V14-4.5A

X5163V Z AL X5165V14Z-4.5A X5165V Z AL

(Note)

X5163V AM

X5165V14I-4.5A

X5165V AM

X5163V14IZ-4.5A X5163V Z AM X5165V14IZ-4.5A X5165V Z AM

(Note)

*Add "T1" suffix for tape and reel.

**Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications.

Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL

classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

FN8128.3

June 1, 2006

X5163, X5165

Block Diagram

Watchdog Transition

Detector

SCK

CS/WDI

Data

Command

Decode &

Control

Logic

Threshold

Reset Logic

Protect Logic

RESET/RESET

Status

EEPROM Array

4K Bits

8K Bits

Reset &

Watchdog

Timebase

X5163 = RESET

X5165 = RESET

Watchdog

Timer Reset

TRIP

Power-on and

Low Voltage

Reset

Generation

Pin Description

(SOIC/PDIP)

PIN TSSOP

NAME

CS/WDI

FUNCTION

Chip Select Input.

CS HIGH, deselects the device and the SO output pin is at a high impedance

state. Unless a nonvolatile write cycle is underway, the device will be in the standby power mode.

CS LOW enables the device, placing it in the active power mode. Prior to the start of any

operation after power-up, a HIGH to LOW transition on CS is required

Watchdog Input.

A HIGH

to LOW transition on the WDI pin restarts the Watchdog timer. The absence of a HIGH to LOW

transition within the watchdog time out period results in RESET/RESET going active.

Serial Output.

SO is a push/pull serial data output pin. A read cycle shifts data out on this pin. The

falling edge of the serial clock (SCK) clocks the data out.

Write Protect.

The WP pin works in conjunction with a nonvolatile WPEN bit to “lock” the setting

of the Watchdog Timer control and the memory write protect bits.

Ground

Serial Input.

SI is a serial data input pin. Input all opcodes, byte addresses, and memory data on this

pin. The rising edge of the serial clock (SCK) latches the input data. Send all opcodes (Table 1),

addresses and data MSB first.

Serial Clock.

The Serial Clock controls the serial bus timing for data input and output. The rising edge

of SCK latches in the opcode, address, or data bits present on the SI pin. The falling edge of SCK

changes the data output on the SO pin.

Reset Output.

RESET/RESET is an active LOW/HIGH, open drain output which goes active

whenever V

falls below the minimum V

sense level. It will remain active until V

rises above

the minimum V

sense level for 200ms. RESET/RESET goes active if the Watchdog Timer is

enabled and CS remains either HIGH or LOW longer than the selectable Watchdog time out

period. A falling edge of CS will reset the Watchdog Timer. RESET/RESET goes active on power-

up at 1V and remains active for 200ms after the power supply stabilizes.

Supply Voltage

No internal connections

SCK

RESET/

RESET

3-5,10-12

FN8128.3

June 1, 2006

X5163, X5165

Principles Of Operation

Power-on Reset

Application of power to the X5163, X5165 activates a Power-

on Reset Circuit. This circuit goes active at 1V and pulls the

RESET/RESET pin active. This signal prevents the system

microprocessor from starting to operate with insufficient

voltage or prior to stabilization of the oscillator. When V

exceeds the device V

TRIP

value for 200ms (nominal) the

circuit releases RESET/RESET, allowing the processor to

begin executing code.

To set the new V

TRIP

voltage, apply the desired V

TRIP

threshold to the V

pin and tie the CS/WDI pin and the WP

pin HIGH. RESET and SO pins are left unconnected. Then

apply the programming voltage V

to both SCK and SI and

pulse CS/WDI LOW then HIGH. Remove V

and the

sequence is complete.

SCK

Low Voltage Monitoring

During operation, the X5163, X5165 monitors the V

level

and asserts RESET/RESET if supply voltage falls below a

preset minimum V

TRIP

. The RESET/RESET signal prevents

the microprocessor from operating in a power fail or

brownout condition. The RESET/RESET signal remains

active until the voltage drops below 1V. It also remains active

until V

returns and exceeds V

TRIP

for 200ms.

FIGURE 1. SET V

TRIP

VOLTAGE

Watchdog Timer

The Watchdog Timer circuit monitors the microprocessor

activity by monitoring the WDI input. The microprocessor

must toggle the CS/WDI pin periodically to prevent a

RESET/RESET signal. The CS/WDI pin must be toggled

from HIGH to LOW prior to the expiration of the watchdog

time out period. The state of two nonvolatile control bits in

the Status Register determine the watchdog timer period.

The microprocessor can change these watchdog bits, or

they may be “locked” by tying the WP pin LOW and setting

the WPEN bit HIGH.

Resetting the V

TRIP

Voltage

This procedure sets the V

TRIP

to a “native” voltage level. For

example, if the current V

TRIP

is 4.4V and the V

TRIP

is reset,

the new V

TRIP

is something less than 1.7V. This procedure

must be used to set the voltage to a lower value.

To reset the V

TRIP

voltage, apply a voltage between 2.7 and

5.5V to the V

pin. Tie the CS/WDI pin, the WP pin, AND

THE SCK pin HIGH. RESET and SO pins are left

unconnected. Then apply the programming voltage V

to the

SI pin ONLY and pulse CS/WDI LOW then HIGH. Remove V

and the sequence is complete.

Threshold Reset Procedure

The X5163, X5165 has a standard V

threshold (V

TRIP

)

voltage. This value will not change over normal operating

and storage conditions. However, in applications where the

standard V

TRIP

is not exactly right, or for higher precision in

the V

TRIP

value, the X5163, X5165 threshold may be

adjusted.

SCK

Setting the V

TRIP

Voltage

This procedure sets the V

TRIP

to a higher voltage value. For

example, if the current V

TRIP

is 4.4V and the new V

TRIP

4.6V, this procedure directly makes the change. If the new

setting is lower than the current setting, then it is necessary

to reset the trip point before setting the new value.

FIGURE 2. RESET V

TRIP

VOLTAGE

FN8128.3

June 1, 2006

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