P4C1024-55FMB datasheet, PDF - EEWORLD Datasheet

P4C1024-55FMB: DescriptionStandard SRAM, 128KX8, 55ns, CMOS, CDFP32, CERPACK-32; Categorystorage storage; File Size38KB，1 Pages; ManufacturerPyramid Semiconductor Corporation; Websitehttp://www.pyramidsemiconductor.com/

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P4C1024-55FMB Overview

Standard SRAM, 128KX8, 55ns, CMOS, CDFP32, CERPACK-32

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Pyramid Semiconductor Corporation
Parts packaging code	DFP
package instruction	CERPACK-32
Contacts	32
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Maximum access time	55 ns
JESD-30 code	R-GDFP-F32
JESD-609 code	e0
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	128KX8
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DFP
Package shape	RECTANGULAR
Package form	FLATPACK
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	FLAT
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED

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