DM74AS1808N datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> DM74AS1808N

DM74AS1808N: DescriptionAS SERIES, HEX 2-INPUT AND GATE, PDIP20, PLASTIC, DIP-20; Categorylogic logic; File Size55KB，2 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

Stay tuned Parametric Compare

DM74AS1808N Overview

AS SERIES, HEX 2-INPUT AND GATE, PDIP20, PLASTIC, DIP-20

DM74AS1808N Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP, DIP20,.3
Contacts	20
Reach Compliance Code	unknown
Other features	IOL = 48MA @ VOL = 0.5V; IOH = 48MA @ VOH = 2V
series	AS
JESD-30 code	R-PDIP-T20
JESD-609 code	e0
length	26.075 mm
Load capacitance (CL)	50 pF
Logic integrated circuit type	AND GATE
MaximumI(ol)	0.048 A
Number of functions	6
Number of entries	2
Number of terminals	20
Maximum operating temperature	70 °C
Minimum operating temperature
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Maximum supply current (ICC)	33 mA
Prop。Delay @ Nom-Sup	6 ns
propagation delay (tpd)	6 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

DM74AS1808N Related Products

	DM74AS1808N	DM74AS1808WMX	DM74AS1808WM
Description	AS SERIES, HEX 2-INPUT AND GATE, PDIP20, PLASTIC, DIP-20	AS SERIES, HEX 2-INPUT AND GATE, PDSO20, 0.300 INCH, PLASTIC, SOIC-20	IC AS SERIES, HEX 2-INPUT AND GATE, PDSO20, 0.300 INCH, PLASTIC, SOIC-20, Gate
Maker	Texas Instruments	Texas Instruments	Texas Instruments
Parts packaging code	DIP	SOIC	SOIC
package instruction	DIP, DIP20,.3	SOP,	SOP,
Contacts	20	20	20
Reach Compliance Code	unknown	unknown	unknown
Other features	IOL = 48MA @ VOL = 0.5V; IOH = 48MA @ VOH = 2V	IOL = 48MA @ VOL = 0.5V; IOH = 48MA @ VOH = 2V	IOL = 48MA @ VOL = 0.5V; IOH = 48MA @ VOH = 2V
series	AS	AS	AS
JESD-30 code	R-PDIP-T20	R-PDSO-G20	R-PDSO-G20
length	26.075 mm	12.8 mm	12.8 mm
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	AND GATE	AND GATE	AND GATE
Number of functions	6	6	6
Number of entries	2	2	2
Number of terminals	20	20	20
Maximum operating temperature	70 °C	70 °C	70 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	SOP	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE	SMALL OUTLINE
Maximum supply current (ICC)	33 mA	33 mA	33 mA
propagation delay (tpd)	6 ns	6 ns	6 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	5.08 mm	2.65 mm	2.65 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	NO	YES	YES
technology	TTL	TTL	TTL
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	THROUGH-HOLE	GULL WING	GULL WING
Terminal pitch	2.54 mm	1.27 mm	1.27 mm
Terminal location	DUAL	DUAL	DUAL
width	7.62 mm	7.5 mm	7.5 mm

Recommended Resources

Semiconductor self-excited excitation circuit

Circuit breaker control circuit with anti-jump device

TBA820M power amplifier circuit diagram

kitchen reminder circuit

Tube AC electronic voltage regulator circuit diagram

Power supply circuit diagram of AST-1401 VGA color display

Conversion issues between PADS, Altium and ORCAD: [color=blue]I saw an article and thought it was good, so I shared it with you. I often hear people talking about how to convert between several drawing board tool softwares, but why the conversion is ...; okhxyyo PCB Design

485 Communication Problems: [color=#666666][font=Tahoma, Verdana, Arial,]I would like to ask an expert, does the common ground or non-common ground (isolation) of the two sides of 485 communication affect the communication dista...; chenbingjy stm32/stm8

2009 Power Technology Salon (Shenzhen): Circuit topology in isolated DC module power supply...; tonytong Power technology

PS2 Interface.pdf: PS2 Interface.pdf...; zxopenljx FPGA/CPLD

【MSP430 Sharing】 MSP430 Learning Experience 3 --- LCD: Overview TI's MSP430 series microcontroller is an ultra-low power mixed signal controller, which includes a series of devices, which are composed of different modules for different applications. Among...; hangsky Microcontroller MCU

TDC - Time to Digital Converter: When using the delay chain in FPGA to implement tdc, when latching the output data of the delay chain, the input data change near the clock edge violates the setup and hold time of the trigger, causin...; FPGA菜鸡 FPGA/CPLD

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components