Features
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High Dynamic Range for AM and FM
Integrated AGC for FM
High Intercept Point 3rd-order for FM
FM Amplifier Adjustable to Various Cable Impedances
High Intercept Point 2nd-order for AM
Low-noise Output Voltage
Low Power Consumption
Electrostatic sensitive device.
Observe precautions for handling.
Low-noise
AM/FM Antenna
Impedance
Matching IC
ATR4254
1. Description
The ATR4254 is an integrated low-noise AM/FM antenna impedance matching circuit
in BiCMOS technology. The device is designed specifically for car applications and is
suitable for windshield and roof antennas.
Figure 1-1.
Block Diagram
1 (14)
15 (13)
2 (15)
3 (16)
4 (2)
14 (11)
I
AGC
AGC
13 (10)
AGCADJ
FM
FMOUT
FMIN
GND1
FMGAIN
AGC
VS
VREF2
5 (3)
VREF
12 (9)
VREF1
11 (8)
AMIN
8 (6)
AM
7 (5)
GND2
() Pin numbers in brackets = QFN16 4
×
4 package
10 (7)
AMOUT1
AMOUT
Rev. 4879A–AUDR–09/05
2. Pin Configuration
Figure 2-1.
FMIN
Pinning SO16
1
16 NC
15 FMOUT
14
VS
Figure 2-2.
Pinning QFN16 4
×
4
FMGAIN
FMGND
FMIN
FMOUT
GND1 2
FMGAIN 3
AGC
VREF2
NC
4
5
6
7
8
NC
AGC
VREF2
NC
1
2
3
4
16 15 14 13
12 NC
11 VS
10 AGCADJ
9 VREF1
5 6 7 8
GND2
AMIN
AMOUT
AMOUT1
13 AGCADJ
12
VREF1
11 AMOUT1
10
9
AMOUT
GND2
AMIN
NC
Table 2-1.
Pin SSO16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Description
Pin QFN16
14
15
16
2
3
1
5
6
4
7
8
9
10
11
13
12
Symbol
FMIN
GND1
FMGAIN
AGC
VREF2
NC
GND2
AMIN
NC
AMOUT
AMOUT1
VREF1
AGCADJ
VS
FMOUT
NC
Function
FM input
Ground for FM part
FM gain adjustment
AGC output
Reference voltage 2 output
Not connected
Ground for AM part
AM input
Not connected
AM output
AM output
Reference voltage 1 output
Adjustment FM wide-band AGC threshold
Supply voltage
FM output
Not connected
2
ATR4254
4879A–AUDR–09/05
ATR4254
3. Pin Description
3.1
FMIN
The input of the FM amplifier, FMIN, is a bipolar transitor’s base. A resistor or a coil is connected
between FMIN and VREF2. If a coil is used, the noise performance is excellent.
Figure 3-1.
Internal Circuit at Pin FMIN
1
FMIN
ESD
3.2
GND1
To avoid cross-talk between AM and FM signals, the circuit has two separate ground pins.
GND1 is the ground for the FM part.
3.3
FMGAIN
The DC current of the FM amplifier transistor is adjusted by an external resistor which is con-
nected between FMGAIN and GND1. To influence the AC gain of the amplifier, a resistor is
connected in series to a capacitor between FMGAIN and GND1. The capacitor has to shorten
frequencies of 100 MHz.
Figure 3-2.
Internal Circuit at Pin FMGAIN
ESD
FMGAIN
3
3.4
AGC
DC current flows into the AGC pin at high FM antenna input signals. This current has to be
amplified via the current gain of an external PNP transistor that feeds a PIN diode. This diode
dampens the antenna’s input signal and protects the amplifier input against overload. The maxi-
mum current which flows into the AGC pin is approximately 1 mA. In low-end applications, the
AGC function is not necessary and the external components can therefore be omitted.
3
4879A–AUDR–09/05
Figure 3-3.
Internal Circuit at Pin AGC
AGC
4
ESD
V
S
3.5
AGCADJ
The threshold of the AGC can be adjusted by varying the DC current at pin AGCADJ. If pin
AGCADJ is connected directly to GND1, the threshold is set to 96 dBµV at the FM amplifier out-
put. If a resistor is connected between AGCADJ and GND1, the threshold is shifted to higher
values with increasing resistances. If AGCADJ is open, the threshold is set to 106 dBµV.
Figure 3-4.
Internal Circuit at Pin AGCADJ
65 kΩ
ESD
13
AGCADJ
3.6
FMOUT
The FM amplifier output is an open collector of a bipolar RF transistor. It should be connected to
V
S
via a coil.
Figure 3-5.
Internal Circuit at Pin FMOUT
15
FMOUT
ESD
4
ATR4254
4879A–AUDR–09/05
ATR4254
3.7
AMIN
The AM input has an internal bias voltage. The DC voltage at this pin is V
Ref1/2
. The input resis-
tance is about 470 kΩ. The input capacitance is less than 10 pF.
Figure 3-6.
Internal Circuit at Pin AMIN
VREF1/2
470 kΩ
8
AMIN
ESD
3.8
AMOUT, AMOUT1
The buffered AM amplifier consists of a complementary pair of CMOS source followers. The
transistor gates are connected to AMIN. The pin AMOUT is the NMOS transistor's source, pin
AMOUT1 is the PMOS transistor's source. Due to the two different DC levels of these pins, they
have to be connected together via an external capacitor of about 100 nF. This technique can
achieve an excellent dynamic range.
Figure 3-7.
Internal Circuit at Pins AMOUT1 and AMOUT
AMOUT1
ESD
11
AMOUT
ESD
10
3.9
VREF1
VREF1 is the stabilized voltage for the AM amplifier and the AGC block. To achieve excellent
noise performance at LW frequencies, it is recommended that this pin be connected to ground
via an external capacitor of about 1 µF.
5
4879A–AUDR–09/05
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