BD90571EFJ-C datasheet, PDF - EEWORLD Datasheet

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BD90571EFJ-C: Description2.69 to 5.5V, 1.2V Output, 2.25MHz Synchronous Step-Down Converter; File Size743KB，22 Pages; ManufacturerROHM Semiconductor; Websitehttps://www.rohm.com/

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BD90571EFJ-C Overview

2.69 to 5.5V, 1.2V Output, 2.25MHz Synchronous Step-Down Converter

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Datasheet

Secondary power supply series for automotive

2.69 to 5.5V, 1.2V Output, 2.25MHz

Synchronous Step-Down Converter

BD90571EFJ-C

●General

Description

The BD90571EFJ-C is a synchronous rectification type

step-down DC/DC converter with a 2.25MHz fixed

frequency that operates in with an input voltage range

of 2.69V-5.5V. It has an integrated feedback resistor

that

supplies a fixed output voltage of 1.2V and a

phase compensation constant. Applications can be

created with a minimum of three external components.

Moreover, the integrated Pch and Nch output MOSFET

can supply a maximum output current of 1A.

●Features

■

Thanks to the integrated output feedback resistor

and phase compensation, applications can be

created with a minimum of external components

■

Excellent load response through current mode

control

■

Integrated Pch and Nch output MOSFET

■

Integrated overcurrent protection with auto-reset

■

Integrated output overvoltage detection/

short-circuit detection

■

Integrated TSD and UVLO

■

Light load mode/PWM fixation operation selection

terminal

●Applications

■

Automotive equipment

■

Car audio and navigation

■

Other electronic equipment

●Typical

application circuit

100

1.5μH

●Key

Specifications

■

Input voltage range

■

Output voltage

■

Output voltage accuracy

■

Operating frequency

■

Maximum output current

■

Circuit current at standby

■

Operational temperature

range

●Package

HTSOP-J8

2.69V½5.5[V]

1.2 [V] (Typ.)

±2.0[%](-40½+125°C)

2.25 [MHz] (Typ.)

1.0 [A] (Max.)

0[μA](Typ., 25°C)

-40½+125[°C]

4.90

㎜×6.00 ㎜×1.00 ㎜

Light Load MODE

EFFICIENCY [%]

10μF

1μF

47μF

PWM MODE

VIN=5.0V

Figure 1 CIRCUIT

0.01

0.10

LOAD CURRENT [A]

1.00

Figure 1. Typical application circuit

(VIN=5V, VOUT=1.2V, IOUT=1A)

Figure 2. Efficiency(VIN=5V)

○Product

structure：Silicon monolithic integrated circuit

○This

product is not designed to be radiation resistant.

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BD90571EFJ-C

●Block

operation descriptions

■

Datasheet

Standby

The circuit enters the state of standby when the terminal EN is set to 0.7V or less. All the circuits, such as internal

reference voltage VREF, oscillators OSC, and drivers are turned off during standby, and current consumption of the

power supply becomes 0μA(25℃, Typ.). Via the FB terminal, the output capacitor is discharged at a resistance of

1kΩ.

Start operation

The circuit starts operating when terminal EN is set to 2.1V or more. A soft start circuit (SOFT START) is integrated to

prevent inrush current to the capacitor when starting. The output voltage reaches a set voltage with 1ms(Typ.) while

following the startup of the soft start circuit. There is a delay of about 200μsec up to the beginning of soft start after the

terminal EN is turned on and the internal logic operation is started. In order to prevent a defective start, the short-circuit

protection is not active during startup.

Error amplifier and phase compensation

The voltage of the output feedback terminal (FB) is compared with an internal reference voltage, the voltage

corresponding to the difference is generated, and send to the PWM comparator which determines the duty ratio of the

output. The feedback resistor which determines the output voltage, resistance for compensations, and the capacitor are

integrated into the BD90571EFJ-C.

Oscillator

The 2.25MHz(Typ.) internally fixed clock is generated and send to the slope generation circuit (SLOPE) and to the

driver.

Light load mode and PWM fixation mode

BD90571EFJ-C operates in the light load mode when the terminal MODE is set to 0.7V or less. When the output load

current is small, the switching operation automatically becomes intermittent in the light load mode. The efficiency at

light load improves compared to the PWM fixation mode because the switching loss is suppressed by operating

intermittently. The intermittently operating load current level changes depending on the input voltage, inductor value,

etc.

If the terminal MODE is set to 2.1V or more the chip operates in PWM fixation mode. In the PWM fixation mode, the

efficiency at a light load decreases compared with the light load mode. However, because of the fixed frequency

switching through the entire load range, noise is more easily countered.

■

VOUT(10mV/div)

Figure 5. Switching operation at light load mode

■

Figure 6. Switching operation at PWM mode

Overcurrent detection

When in the output stage the current flowing to the Pch FET is 1.0A(Min.) or more, the Pch FET is turned off and the

power supply to the output is intercepted. The overcurrent detection is operated every cycle, limits the switching duty,

and returns at the next clock cycle.

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Datasheet

Output short-circuit detection

The output short-circuit detection circuit (SCP) detects a short-circuit of the output when output voltage falls below 70%

of a set value during 1024 cycles of the frequency. In this case, the Pch FET and Nch FET of the output are turned off,

and the power supply is intercepted. The count is reset when the output voltage returns to 70% or more before 1024

cycles, and the output voltage returns to the set value.

Ths SCP automatically resets when after 1024 cycles of the frequency after detecting the short-circuit, and switching

is restarted. Resetting triggers the soft start operation because the internal soft start circuit is initialized when the

short-circuit detection is activated. The short-circuit detection circuit is not active while soft start is starting. In case the

short-circuit continues after resetting, the cycle of starting with a soft start, turning off the output after 1024 cycles, and

returning after 1024 cycles is repeated.

Output overvoltage detection

When the output overvoltage detection circuit (OVP) detects that the output voltage is exceeding 120% of a set value,

the Pch FET and Nch FET of the output are turned off and the power supply is intercepted. Switching is restarted if

after the power supply interception the output decreases and the overvoltage situation is released. The overvoltage

detection voltage and the release voltage have a hysteresis of about 100mV.

UVLO

The UVLO circuit is activated and shuts down the circuit when the input voltage (VIN) decreases to 2.6V or less. When

the UVLO is activated, the control circuit of the error amplifier, the oscillator, the driver and, the output is turned off. Via

the FB terminal, the output capacitor is discharged at a resistance of 1kohm. Afterwards, UVLO is released when the

input voltage VIN rises to 2.69V or more, and the output is restored. The output voltage starts with soft start when

UVLO is reset.

Thermal shutdown(TSD)

Thermal shutdown (TSD) is activated when the IC junction part temperature exceeds 175

℃(Typ.).

When the TSD is

activated the control circuit of the error amplifier, the oscillator, the driver, and the output is turned off. There is

hysteresis in the detection temperature of TSD, which is reset when the junction temperature decreases to 150℃(Typ.)

or less. The output voltage starts with soft start when TSD is reset.

■

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