EEWORLDEEWORLDEEWORLD

Part Number

Search

LPD301-012-28-VC-075

Description
DC-DC Regulated Power Supply Module, 1 Output, 75W, Hybrid
CategoryPower/power management    The power supply circuit   
File Size380KB,2 Pages
ManufacturerNatel Engineering Company
Download Datasheet Parametric View All

LPD301-012-28-VC-075 Overview

DC-DC Regulated Power Supply Module, 1 Output, 75W, Hybrid

LPD301-012-28-VC-075 Parametric

Parameter NameAttribute value
MakerNatel Engineering Company
package instruction,
Reach Compliance Codeunknown
ECCN codeEAR99
Analog Integrated Circuits - Other TypesDC-DC REGULATED POWER SUPPLY MODULE
Maximum input voltage20 V
Minimum input voltage11 V
Nominal input voltage12 V
JESD-30 codeR-XDMA-P9
Number of functions1
Output times1
Number of terminals9
Maximum operating temperature100 °C
Minimum operating temperature-20 °C
Maximum output voltage30.8 V
Minimum output voltage18.2 V
Nominal output voltage28 V
Package body materialUNSPECIFIED
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Certification statusNot Qualified
surface mountNO
technologyHYBRID
Temperature levelOTHER
Terminal formPIN/PEG
Terminal locationDUAL
Maximum total power output75 W
Fine-tuning/adjustable outputYES
Optimization of ZDO layer
1. Assoc optimization. When a node initiates an AssocReq request to a coordinator or router, the coordinator or router will receive the AssocInd message and return an AssocRsp. If the address assigned...
罗菜鸟 RF/Wirelessly
Port reuse problem
I am a newbie and want to do some experiments with the FPGA board at school. I have three modules in a FBGA. One of them is selected by the address signal. They are all eight bits. If I want to multip...
sucuiqin Embedded System
Within the power range of the sampling resistor, what causes the sampling resistor to heat up?
[color=#000]When debugging the circuit, I found that when the current flowing through the sampling resistor is 3A, the circuit runs for a while and I feel hot to the touch. The resistor is 2512 packag...
pengbiao1210 Power technology
Huawei's classic internal FPGA timing documentation---Methods for FPGA input delay constraints
[font=宋体][size=18px]This video abandons complex theories and analyzes various situations according to the actual engineering situation. Just choose the correct situation and then constrain it. [/size]...
PKJIE吴 FPGA/CPLD
Research Papers
[i=s] This post was last edited by paulhyde on 2014-9-15 09:23 [/i] Scientific research papers, these are all collected to increase your knowledge...
江汉大学南瓜 Electronics Design Contest
Problems with Differential Input Stages
What are the functions and values of Cc and Rc in the figure?...
禁止双弓 Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1366  2756  2798  202  2670  28  56  57  5  54 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号