MB15FxxSL Series
Description
Dual PLL Frequency Synthesizers
with On-Chip Prescalers
Packages
The Fujitsu FxxSL series dual PLLs are serial input frequency
synthesizers operating up to 2.5 GHz. They have built-in
dual-modulus prescalers enabling pulse swallow operation.
The latest advanced BiCMOS technology is used resulting in a
super low supply current. A refined charge pump design
(Fujitsu’s Super Charger) provides fast tuning along with low
spurious noise and phase noise characteristics. The F-series is
ideally suited for digital mobile communications, including
GSM, DCS1800, PCS1900, IS-136, IS-95: and ISM applications.
16-pin plastic SSOP,
FPT-16P-M05
16-pin
(LCC-16P-M04)
BCC,
plastic
LCC-16P-M06
Features
• MB15F02SL and MB15F03SL: RF and IF PLLs
• MB15F07SL and MB15F08SL: Dual RF PLLs
• Very low spurious and phase noise characteristics
• Low operating voltage: 2.4 to 3.6 volts
• Low operating current: 3.0 to 7.5 mA (typical)
• Power-saving current: 0.1µA (typical)
• Wide operating temperature: –40 to +85°C
• Plastic 16-pin SSOP and 16-pin BCC packages
• Reference counter:
– 14-bit programmable divider: 3 to 16383
• 18-bit programmable divider:
– Binary 7-bit swallow counter: 0 to 127
– Binary 11-bit programmable counter: 3 to 2047
• Software selectable charge pump current (±1.5 or ±6.0 mA)
• Evaluation Kits available
Parameter
RF Frequency of Operation, max.
IF/RF Frequency of Operation, max
Low Power Supply Voltage
Low Power Supply Current
MB15F02SL
1.2 GHz
500 MHz
2.7V
3.0 mA
MB15F03SL
1.75 GHz
600 MHz
2.7V
5.0 mA
MB15F07SL
1.1 GHz
1.1 GHz
2.7V
5.0 mA
RF = 64/65 or 128/129
RF = 64/65 or 128/129
0.1µA typ.
MB15F08SL
2.5 GHz
1.1 GHz
2.7V
7.0 mA
Rx = 32/33 or 64/65
Tx = 16/17 or 32/33
Prescaler Divide Ratios
RF = 64/65 or 128/129,
IF = 8/9 or 16/17
Power-Saving Function
Dual PLL Frequency Synthesizers with On-Chip Prescalers
Table of Contents
Pin Descriptions: MB15F02SL, MB15F03SL........................................................................................................................... 2
Block Diagram: MB15F02SL, MB15F03SL............................................................................................................................. 3
Pin Descriptions: MB15F07SL, MB15F08SL ......................................................................................................................... 4
Block Diagram: MB15F07SL, MB15F08SL............................................................................................................................. 5
Absolute Maximum Ratings ................................................................................................................................................... 6
Recommended Operating Conditions....................................................................................................................................... 6
Handling Precautions ..................................................................................................................................................... 6
Electrical Characteristics ....................................................................................................................................................... 7
Measurement Circuit (f
IN
, OSC
IN
Input Sensitivity) ................................................................................................................... 9
Typical Electrical Characteristics: MB15F02SL ...................................................................................................................... 10
Reference Information: MB15F02SL .............................................................................................................................. 13
Typical Electrical Characteristics: MB15F03SL ...................................................................................................................... 14
Reference Information: MB15F03SL .............................................................................................................................. 17
Typical Electrical Characteristics: MB15F07SL ...................................................................................................................... 18
Reference Information: MB15F07SL .............................................................................................................................. 21
Typical Electrical Characteristics: MB15F08SL ...................................................................................................................... 22
Reference Information: MB15F08SL .............................................................................................................................. 25
Functional Descriptions ...................................................................................................................................................... 26
Serial Data Input ......................................................................................................................................................... 26
Table 1. Control Bits .................................................................................................................................................... 26
Shift Register Configuration for the Programmable Reference Counter.......................................................................... 26
Shift Register Configuration for the Programmable Counter........................................................................................ 27
Table 2. Binary 14-Bit Programmable Reference Counter Data Setting ................................................................................ 27
Table 3. Test Purpose Bit Setting .................................................................................................................................... 27
Table 4. Binary 11-Bit Programmable Counter Data Setting .............................................................................................. 28
Table 5. Binary 7-Bit Swallow Counter Data Setting ......................................................................................................... 28
Table 6. Prescaler Data Setting for MB15F02SL, MB15F03SL .......................................................................................... 28
Prescaler Data Setting for MB15F07SL ................................................................................................................... 28
Prescaler Data Setting for MB15F08SL.................................................................................................................... 28
Table 7. Phase Comparator Phase Switching Data Setting.................................................................................................. 29
Table 8. LD/f
OUT
Output Select Data Setting ................................................................................................................... 29
Table 9. Charge Pump Current Setting ............................................................................................................................ 29
Power Saving Mode (Intermittent Mode Control Circuit) ........................................................................................................ 30
Table 10. Power-Save Pin Setting.................................................................................................................................... 30
Table 11. Power-Save Internal Shutdown Logic ................................................................................................................ 30
0
Fujitsu Microelectronics, Inc.
MB15FxxSL Series
Serial Data Input Timing......................................................................................................................................................31
Table 12. Timing Parameters ..........................................................................................................................................31
Phase Detector Output Waveform ..........................................................................................................................................32
Table 13. LD Output Logic Table ....................................................................................................................................32
Application Example ...........................................................................................................................................................33
Useage Precautions..............................................................................................................................................................34
Ordering Information ..........................................................................................................................................................34
Package Dimensions ............................................................................................................................................................35
Fujitsu Microelectronics, Inc.
1
Dual PLL Frequency Synthesizers with On-Chip Prescalers
Pin Descriptions: MB15F02SL, MB15F03SL
Pin No.
SSOP
1
2
3
4
5
6
BCC
16
1
2
3
4
5
Pin Name
GND
RF
OSC
IN
GND
IF
fin
IF
Vcc
IF
LD/f
OUT
I/O
–
I
–
I
–
O
Ground for RF-PLL section
Programmable reference divider input. TCXO should be connected via an AC coupling capacitor.
Ground for IF-PLL section
Prescaler input pin for IF-PLL
Connection to an external VCO should be via AC coupling.
Power supply voltage input pin for IF-PLL section
Lock detect signal output (LD)/phase comparator monitoring output (f
OUT
)
Output signal is selected by LDS bit in the serial data.
LDS bit = “H” outputs fout signal. LDS bit = “L” ;outputs LD signal.
Power-saving mode control for IF-PLL section. This pin must be set at “L” during Power-ON.
(Open is prohibited.)
PS
IF
= “H” sets normal mode. PS
IF
= “L” sets power-saving mode.
Charge pump output for IF-PLL section
Phase characteristics of phase detector can be selected via programming of the FC-bit.
Charge pump output for RF-PLL section
Phase characteristics of phase detector can be selected via programming of the FC-bit.
Power-saving mode control for RF-PLL section. This pin must be set at “L” during Power-ON.
(Open is prohibited.)
PS
RF
= “H” sets normal mode. PS
RF
= “L” sets power-saving mode.
Prescaler complementary input for RF-PLL section
Pin should be grounded via a capacitor.
Power supply voltage input pin for RF-PLL section, shift register and oscillator input buffer
When power is OFF, latched data of RF-PLL is lost.
Prescaler input pin for RF-PLL
Connection to an external VCO should be via AC coupling.
Load enable signal input (with a Schmitt trigger input buffer)
When the LE bit is set “H”, data in shift register is transferred to corresponding latch according to control bit in the
serial data.
Serial data input (with a Schmitt trigger input buffer)
Data is transferred to corresponding latch (IF-reference counter, IF-program counter, RF-reference counter, RF-program
counter) according to control bit in the serial data.
Clock input for the 23-bit shift register (with a Schmitt trigger input buffer)
One bit of data is shifted into shift register on a rising edge of the clock.
Descriptions
7
6
PS
IF
I
8
9
7
8
Do
IF
Do
RF
O
O
10
9
PS
RF
I
11
12
13
10
11
12
Xfin
RF
Vcc
RF
fin
RF
I
–
I
14
13
LE
I
15
14
Data
I
16
15
Clock
I
GND
RF
OSC
IN
GND
IF
fin
IF
V
CCIF
LD/fout
PS
IF
D
OIF
1
2
3
4
5
6
7
8
TOP
VIEW
16
15
14
13
12
11
10
9
Clock
Data
LE
fin
RF
V
CCRF
Xfin
RF
PS
RF
D
ORF
OSC
IN
GND
IF
fin
IF
V
CCIF
LD/fout
PS
IF
1
2
3
4
5
6
GND
RF
Clock
16
15
14
13
TOP
VIEW
12
11
10
7
8
9
Data
LE
fin
RF
V
CCRF
Xfin
RF
PS
RF
D
OIF
D
ORF
FPT-16P-M05
2
Fujitsu Microelectronics, Inc.
LCC-16P-M04
MB15FxxSL Series
Block Diagram: MB15F02SL, MB15F03SL
V
CCIF
GND
IF
5 (4) 3 (2)
PS
IF
7
(6)
Intermittent
mode control
(IF-PLL)
3-bit latch
LDS SW
IF
FC
IF
7-bit latch
Binary 7-bit
swallow counter
(IF-PLL)
11-bit latch
Binary 11-bit
programmable
counter (IF-PLL)
fp
IF
Phase
comp.
(IF-PLL)
Charge
Current
pump
Switch
(IF-PLL)
8 Do
IF
(7)
fin
IF
4
(3)
Prescaler
(IF-PLL)
8/9, 16/17
Lock
Det.
(IF-PLL)
2-bit latch
14-bit latch
Binary 14-bit
programmable ref.
counter (IF-PLL)
1-bit latch
C/P setting
current CP
LD
IF
T1
T2
fr
IF
OSC
IN
2
(1)
fr
RF
OR
T1
T2
Binary 14-bit
programmable ref.
counter (RF-PLL)
C/P setting
current CP
AND
Selector
2-bit latch
14-bit latch
1-bit latch
LD
fr
IF
fr
RF
fp
IF
fp
RF
Lock
Det.
(RF-PLL)
6 LD/
(5) f
OUT
(12)
fin
RF
13
Xfin
RF
11
(10)
Prescaler
(RF-PLL)
64/65, 128/129
PS
RF
10
(9)
Intermittent
mode control
(RF-PLL)
LDS
SW
RF
FC
RF
Binary 7-bit
swallow counter
(RF-PLL)
Binary 11-bit
programmable
counter (RF-PLL)
Phase
comp.
(RF-PLL)
fp
RF
(RF-PLL)
Charge
Current
pump
switch
9 Do
RF
(8)
3-bit latch
7-bit latch
11-bit latch
LE 14
(13)
(14)
Data 15
Clock 16
(15)
Schmitt
circuit
Latch selector
Schmitt
circuit
Schmitt
circuit
C C
N N
1 2
23-bit shift register
: SSOP
( ) : BCC
12 (11) 1 (16)
V
CCRF
GND
RF
Fujitsu Microelectronics, Inc.
3
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