ATA5781/ATA5782/ATA5783
UHF ASK/FSK Receiver
SUMMARY DATASHEET
Features
●
AVR
®
microcontroller core with 1Kbyte SRAM and 24Kbyte RF library in firmware
(ROM)
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Atmel
®
ATA5782: 20Kbyte of user flash
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Atmel ATA5783: 20Kbyte of user ROM
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Atmel ATA5781: No user memory — RF library in firmware only
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Supported frequency ranges
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Low-band 310MHz to 318MHz, 418MHz to 477MHz
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High-band 836MHz to 956MHz
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315.00MHz/433.92MHz/868.30MHz and 915.00MHz with one 24.305MHz crystal
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Low current consumption
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9.8mA for RXMode (low-band), 1.2mA for 21ms cycle three-channel polling
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Typical OFFMode current of 5nA (maximum 600nA at Vs = 3.6V and T = 85°C)
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Supports the 0dBm class of ARIB STD-T96
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Input 1dB compression point
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–48dBm (full sensitivity level)
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–20dBm (active antenna damping)
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Programmable channel frequency with fractional-N PLL
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93Hz resolution for low-band
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185Hz resolution for high-band
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FSK deviation ±0.375kHz to ±93kHz
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FSK sensitivity (Manchester coded) at 433.92MHz
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–108.5dBm at 20Kbit/s
–111dBm at 10Kbit/s
–114dBm at 5Kbit/s
–122.5dBm at 0.75Kbit/s
Δf
= ± 20kHz
Δf
= ± 10kHz
Δf
= ± 5kHz
Δf
= ± 0.75kHz
BWIF = 80kHz
BWIF = 25kHz
BWIF = 165kHz
BWIF = 165kHz
BWIF = 165kHz
BWIF = 25kHz
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ASK sensitivity (Manchester coded) at 433.92MHz
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–110.5dBm at 20Kbit/s
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–125dBm at 0.5Kbit/s
This is a summary document.
The complete document is
available under NDA. For more
information, please contact
your local Atmel sales office.
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Programmable Rx-IF bandwidth 25kHz to 366kHz (approximately 10% steps)
Blocking (BWIF = 165kHz): 64dBc at frequency offset = 1MHz and 48dBc at 225kHz
High image rejection: 55dB at 315MHz/433.92MHz and 47dB at 868.3MHz/915MHz
without calibration
9286FS-RKE-08/14
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Supported data rate in buffered mode 0.5Kbit/s to 80Kbit/s (120Kbit/s NRZ)
Supports pattern-based wake-up and start of frame identification
Flexible service configuration concept with on-the-fly (OTF) modification (in IDLEMode) of SRAM service parameters
(data rate, …)
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Each service consists of
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One service-specific configuration part
Three channel-specific configuration parts
Three service configurations are located in EEPROM
Two service configurations are located in SRAM and can be modified via SPI or embedded application
software
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Digital RSSI with very high relative accuracy of ±1dB thanks to digitized IF processing
Programmable clock output derived from crystal frequency
1024byte EEPROM data memory for receiver configuration
SPI interface for Rx data access and receiver configuration
500Kbit SPI data rate for short periods on SPI bus and host controller
On demand services (SPI or API) without polling or telegram reception
Integrated temperature sensor
Self check and calibration with temperature measurement
Configurable EVENT signal indicates the status of the IC to an external microcontroller
Automatic low-power channel polling
Flexible polling configuration concerning timing, order and participating channels
Fast reaction time
Power-up (typical 1.5ms, OFFMode -> RXMode)
Supports mixed ASK/FSK telegrams
Non-byte aligned data reception
Software customization
Antenna diversity with external switch via GPIO control
Antenna diversity with internal SPDT switch
Supply voltage ranges 1.9V to 3.6V and 2.4V to 5.5V
Temperature range –40°C to +105°C
ESD protection at all pins (±4kV HBM, ±200V MM, ±750V FCDM)
Small 5
×
5mm QFN32 package/pitch 0.5mm
Backward package and pin-to-pin compatibility with Atmel
®
ATA5780N
Backward RF matching compatibility with Atmel ATA5780N (RF redesign not needed)
Suitable for applications governed by EN 300 220 and FCC part 15, title 47
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ATA5781/ATA5782/ATA5783 [SUMMARY DATASHEET]
9286FS–RKE–08/14
1.
1.1
General Product Description
Introduction
The Atmel
®
ATA5781/2/3 is a highly integrated, low-power UHF ASK/FSK RF receiver with an integrated AVR
®
microcontroller. It is package and pin-to-pin compatible with the previous generation of RF devices (Atmel ATA5830N,
ATA5831/2/3 and Atmel ATA5780N).
The Atmel ATA5781/2/3 is partitioned into three sections; an RF front end, a digital baseband and the low-power 8-bit AVR
microcontroller. The product is designed for the ISM frequency bands in the ranges of 310MHz to 318MHz, 418MHz to
477MHz and 836MHz to 956MHz. The external part count is kept to a minimum due to the very high level of integration in
this device. By combining outstanding RF performance with highly sophisticated baseband signal processing, robust
wireless communication can be easily achieved. The receive path uses a low-IF architecture with an integrated double
quadrature receiver and digitized IF processing. This results in high image rejection and excellent blocking performance. In
addition, highly flexible and configurable baseband signal processing allows the receiver to operate in several scanning,
wake-up and automatic self-polling scenarios. For example, during polling the IC can scan for specific message content
(IDs) and save valid telegram data in the FIFO buffer for later retrieval. The device integrates two receive paths that enable
a parallel search for two telegrams with different modulations, data rates, wake-up conditions, etc.
The Atmel ATA5781/2/3 implements a flexible service configuration concept and supports up to 15 channels. The channels
are grouped into five service configurations with three channels each. Three service configurations are located in the
EEPROM. Two service configurations are located in the SRAM to allow on-the-fly modifications during IDLEMode via SPI
commands or application software. The application software is located in the Flash for Atmel ATA5782 or in the ROM for
Atmel ATA5783. Highly configurable and autonomous scanning capability enables flexible polling scenarios with up to 15
channels. The configuration of the receiver is stored in a 1024byte EEPROM. The SPI interface enables external control and
device reconfiguration.
Table 1-1.
Program Memory Comparison of Atmel ATA5781/2/3 Devices
Atmel Firmware ROM
24Kbyte
24Kbyte
24Kbyte
User Flash
20Kbyte
-
-
User ROM
-
20Kbyte
-
Device
Atmel ATA5782
Atmel ATA5783
Atmel ATA5781
In the Atmel ATA5782 the internal microcontroller with 20Kbyte user flash can be used to add custom extensions to the
Atmel firmware. The Atmel ATA5783 provides 20Kbyte user ROM as a replacement for the 20Kbyte Flash for high-volume
applications. The Atmel ATA5781 embeds only the firmware ROM without user memory.
The debugWIRE and ISP interface are available for programming purposes.
Compatibility to the Atmel ATA5780N, Atmel ATA5830N and Atmel ATA5831/2/3
The Atmel ATA5781/2/3 is pin-to-pin compatible with the Atmel ATA5830N transceiver, the Atmel ATA5780N receiver and
the Atmel ATA5831/2/3 transceivers. The Rx performance of the receivers matches that of the transceivers.
ATA5781/ATA5782/ATA5783 [SUMMARY DATASHEET]
9286FS–RKE–08/14
3
1.2
System Overview
Figure 1-1. Circuit Overview
SRC, FRC
Oscillators
Supply
Reset
AVR CPU
RFIN
RF
Front End
Rx DSP
AVR
Peripherals
DATA BUS
XTO
Port B (8)
Port C (6)
XTAL
PB[7..0]
(SPI)
PC[5..0]
Figure 1-1
shows an overview of the main functional blocks of the Atmel
®
ATA5781/2/3. External control of the
Atmel ATA5781/2/3 is performed through the SPI pins SCK, MOSI, MISO, and NSS on port B. The configuration of the
Atmel ATA5781/2/3 is stored in the EEPROM and a large portion of the functionality is defined by the firmware located in the
ROM and processed by the AVR
®
. An SPI command can trigger the AVR to configure the hardware according to settings
that are stored in the EEPROM and start up a given system mode (e.g., RXMode, or PollingMode). Internal events such as
“Start of Telegram” or “FIFO empty” are signaled to an external microcontroller on pin 28 (PB6/EVENT).
During the start-up of a service, the relevant part of the EEPROM content is copied to the SRAM. This allows faster access
by the AVR during the subsequent processing steps and eliminates the need to write to the EEPROM during runtime
because parameters can be modified directly in the SRAM. As a consequence the user does not need to observe the
EEPROM read/write cycle limitations.
It is important to note that all PWRON and NPWRON pins (PC1..5, PB4, PB7) are active in OFFMode. This means that even
if the Atmel ATA5781/2/3 is in OFFMode and the DVCC voltage is switched off, the power management circuitry within the
Atmel ATA5781/2/3 biases these pins with VS.
AVR ports can be used as button inputs, external LNA supply voltage (RX_ACTIVE), LED drivers, EVENT pin, switching
control for additional SPDT switches, general purpose digital inputs, or wake-up inputs, etc. Some functionality of these ports
is already implemented in the firmware and can be activated by adequate EEPROM configurations. Other functionality is
available only through custom software residing in the 20Kbyte flash program memory (Atmel ATA5782) or in the 20Kbyte
user ROM program memory (Atmel ATA5783).
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ATA5781/ATA5782/ATA5783 [SUMMARY DATASHEET]
9286FS–RKE–08/14
EEPROM
SRAM
Flash
ROM
1.3
Pinning
Figure 1-2. Pin Diagram
ATEST_IO1
ATEST_IO2
AGND
PB7
PB6
PB5
PB4
26
32
31
30
29
28
27
25
24
RFIN_LB
RFIN_HB
SPDT_RX
SPDT_ANT
NC
SPDT_RX2
NC
VS_SPDT
PB3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
exposed die pad
PB2
PB1
PB0
DGND
DVCC
PC5
PC4
PC3
23
22
Atmel
ATA5781
ATA5782
ATA5783
21
20
19
18
17
TEST_EN
XTAL1
XTAL2
AVCC
VS
PC0
PC1
Note:
Table 1-2.
Pin No.
1
2
3
4
5, 7
6
8
9
10
11
12
13
14
The exposed die pad is connected to the internal die.
Pin Description
Pin Name
RFIN_LB
RFIN_HB
SPDT_RX
SPDT_ANT
NC
SPDT_RX2
VS_SPDT
TEST_EN
XTAL1
XTAL2
AVCC
VS
PC0
Type
Analog
Analog
Analog
Analog
-
Analog
Analog
–
Analog
Analog
Analog
Analog
Digital
Description
LNA input for low-band frequency range (< 500MHz)
LNA input for high-band frequency range (> 500MHz)
Rx switch output (damped signal output)
Antenna input (RXMode) of the SPDT switch
Open in application
RX switch output 2 (damped signal output)
SPDT supply
3V application supply voltage input
Test enable, connected to GND in application
Crystal oscillator pin 1 (input)
Crystal oscillator pin 2 (output)
RF front end supply regulator output
Main supply voltage input
Main
Alternate
: AVR
®
Port C0
: PCINT8 / NRESET / DebugWIRE
ATA5781/ATA5782/ATA5783 [SUMMARY DATASHEET]
9286FS–RKE–08/14
PC2
5