UNISONIC TECHNOLOGIES CO., LTD
UC3856
Preliminary
LINEAR INTEGRATED CIRCUIT
LOW COST POWER-SAVING
MODE PWM CONTROLLER
FOR FLYBACK CONVERTERS
DESCRIPTION
The UTC
UC3856
is a high performance current mode PWM
controller ideally suited for low standby power. An externally
JFET’s gate pin is connected the ST pin, It can achieve HV start,
and when start was overed, it is no long consume current to
depress the power off. Low V
DD
startup current make the power
reliable on startup design and a large value resistor could be used
in the startup circuit to minimize the standby power. At no load
condition, the IC operates in power-saving mode for lower standby
power, decreasing frequency for Higher conversion efficiency at
light load condition.
The UTC
UC3856
contains protection with automatic recovery
including OLP (over load protection), OTP (over temperature
protection), OVP (over voltage protection), UVLO (V
DD
over voltage clamp and under voltage lockout).To protect
the power MOSFET, Gate-drive output is fixed up to 15V max. The UTC
UC3856
contains protection OCP
(cycle-by-cycle current limiting).
The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge
blanking on current sense input removes the signal glitch, which offering minimal external component count in the
design. Excellent EMI performance is achieved with UTC proprietary frequency hopping technique
(ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than
20kHz during operation.
The UTC
UC3856
has such applications as: battery charger, power adaptor, set-top box power supplies, ink jet
printers, open-frame SMPS.
FEATURES
* High efficiency HV start
* Gate output voltage clamped at 15V
* Low start-up current
* Cycle-by-cycle current limiting
* Under voltage lockout (UVLO)
* Few external components required
* UTC proprietary frequency hopping technology for
Improved EMI performance.
* Power-saving mode for high light-load and standby
efficiency
* Dynamic peak current limiting for constant output power
* Built-in synchronized slope compensation
* OTP,OLP,OVP and V
DD
clamp for higher security
ORDERING INFORMATION
Ordering Number
Lead Free
UC3856L-AG6-R
Halogen Free
UC3856G-AG6-R
Package
SOT-26
Packing
Tape Reel
www.unisonic.com.tw
Copyright © 2014 Unisonic Technologies Co., Ltd
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Qw-R103-077.a
UC3856
MARKING
Preliminary
LINEAR INTEGRATED CIRCUIT
PIN CONFIGURATION
PIN DESCRIPTION
PIN NO.
1
2
3
4
5
6
PIN NAME
GND
FB
ST
SENSE
V
DD
GATE
PIN TYPE
P
I
I
I
P
O
DESCRIPTION
Ground.
Feedback input pin. The PWM duty cycle is determined by voltage
level into this pin and SENSE pin input.
A high voltage start pin. An externally JFET’s gate pin is connected this
pin, It can achieve HV start, and when start was overed, it is no long
consume current.
Current sense input pin. Connected to MOSFET current sensing
resistor node.
Power supply.
The totem-pole output driver for driving the power MOSFET.
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www.unisonic.com.tw
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QW-R103-077.a
UC3856
BLOCK DIAGRAM
Preliminary
LINEAR INTEGRATED CIRCUIT
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www.unisonic.com.tw
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QW-R103-077.a
UC3856
PARAMETER
Preliminary
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS
(T
A
=25°C, V
DD
=15V, unless otherwise specified)
SYMBOL
RATINGS
UNIT
Supply Voltage
V
DD
30
V
Input Voltage to FB Pin
V
FB
-0.3~7
V
Input Voltage to CS Pin
V
SENSE
-0.3~7
V
Junction Temperature
T
J
+150
C
Operating Temperature
T
OPR
-40~+125
°C
Storage Temperature
T
STG
-50~+150
C
Notes: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
OPERATING RANGE
PARAMETER
SYMBOL
V
DD
RATINGS
10~26
UNIT
V
Supply Voltage
ELECTRICAL CHARACTERISTICS
(T
A
=25°C, V
DD
=15V, R
I
=100KΩ，unless otherwise specified)
PARAMETER
SYMBOL
I
ST
I
EAKAGE
I
STR
I
OP
V
DD_CLAMP
V
THD(ON)
V
DD(MIN)
V
FB-OPEN
A
VCS
V
FB(OUT)
V
FB(END)
V
FB(IN)
F
SW
D
MAX
F
J(SW)
F
DV
F
DT
R
FB
V
OVP
V
OLP
T
Delay
T
(THR)
V
CS
T
LEB
V
OL
V
OH
t
R
t
F
V
DD
=V
DD(ON)
-0.1V
V
FB
=3.5V
I_
CLAMP
=20mA
5
1.5
2.80
13
6.5
5.45
3
1.87
2.5
1.56
62
22
75
TEST CONDITIONS
MIN
2
TYP
2.8
MAX
5
10
20
5
29.5
14
7.5
5.75
UNIT
mA
μA
μA
mA
mA
V
V
V
V/V
V
V
V
KHz
KHz
%
%
%
%
KΩ
V
V
mS
°C
V
ns
V
V
ns
ns
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HV START
Supply Current from ST Pin
Start Pin Leakage Current After Startup
SUPPLY SECTION
Start Up Current
IC Operating current
V
DD
Over Voltage Protection (Latchoff)
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
Min. Operating Voltage
CONTROL SECTION
V
FB
Open Loop Voltage Level
PWM Input Gain
Burst-Mode Out FB Voltage
Reduce-Frequency end FB Voltage
Burst-Mode Enter FB Voltage
Normal
Switch Frequency
Power-Saving
Duty Cycle
Frequency Hopping
Frequency VDD Stability
Frequency Temperature Stability
Feedback Resistor
PROTECTION SECTION
VCC Over Voltage Protection Threshold
FB PIN Over Load Protection Threshold
Over Load Protection Delay-Time
OTP threshold
CURRENT LIMITING SECTION
Over Current Flat Threshold Voltage
Lead Edge Blanking Time
DRIVER OUTPUT SECTION
Output Voltage Low State
Output Voltage High State
Output Voltage Rise Time
Output Voltage Fall Time
26.5
12
5.5
5.15
∆V
FB
/∆V
CS
V
SENSE
=0
V
SENSE
=0
V
SENSE
=0
V
FB
=3.5V, RI=100KΩ
Before enter burst mode
V
FB
=3.5V, V
SENSE
=0
V
DD
=12V~20V
T=-20~100°C
55
67
-4
1.5
11
27.2
4.5
98
145
0.75
400
+4
5
5
4.0
V
FB
=3~5V (OLP)
V
FB
=4.2V
V
FB
=4.2V
0.65
5.5
0.85
V
DD
=16,I
O
=-20mA
V
DD
=16,I
O
=20mA
C
L
=1.0nF
C
L
=1.0nF
0.8
10
110
70
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
UC3856
Preliminary
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION
The UTC
UC3856
devices integrate many useful designs into one controller for low-power switch-mode power
supplies. The following descriptions highlight some of the features of the UTC
UC3856
series.
HV Start
A high voltage start pin. An externally JFET’s gate pin is connected this pin, It can achieve HV start, and when
start was overed, it is no long consume current.
Start-up Current
The start-up current is only 5μA. Low start-up current allows a start-up resistor with a high resistance and a
low-wattage to supply the start-up power for the controller. For AC/DC adaptor with universal input range design, a
2.5~3MΩ, 1/8W startup resistor could be used together with a V
DD
capacitor to provide a fast startup and low power
dissipation solution.
Power-Saving Mode Operation
The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under
light-load conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is
taken as the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency
starts to decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load
conditions. The 22KHz minimum frequency control also eliminates the audio noise at any loading conditions.
At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a
fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the
energy. The UTC
UC3856
enter burst mode at standby condition to minimize the switching loss and reduces the
standby power consumption. Power supplies using the UTC
UC3856
can easily meet even the strictest regulations
regarding standby power consumption.
Switch Frequency Set
The maximum switch frequency is set through the 100KΩ RI-pin resistor to 62KHz. Switch frequency is
modulated by output power P
OUT
during IC operating. At no load or light load condition, most of the power dissipation
in a switching mode power supply is from switching loss on the MOSFET transistor, the core loss of the transformer
and the loss on the snubber circuit. The magnitude of power loss is in proportion to the number of switching events
within a fixed period of time. So lower switch frequency at lower load, which more and more improve IC’s efficiency
at light load. At from no load to light load condition, The IC will operate at from Burst mode to Reducing Frequency
Mode. The relation curve between f
SW
and P
OUT
/P
OUT (MAX)
as followed Fig.1. The maximum switch frequency is set
through the RI-pin resistor RI: F
SW
=6200/RI (KΩ) KHz.
Fig.1 The relation curve between f
SW
and relative output power P
OUT
/ P
OUT (MAX)
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www.unisonic.com.tw
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QW-R103-077.a
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