SRAM Module, 512KX32, 35ns, CMOS, PQCC68
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | APTA Group Inc |
| package instruction | QCCJ, LDCC68,1.0SQ |
| Reach Compliance Code | unknown |
| Maximum access time | 35 ns |
| I/O type | COMMON |
| JESD-30 code | S-PQCC-J68 |
| JESD-609 code | e0 |
| memory density | 16777216 bit |
| Memory IC Type | SRAM MODULE |
| memory width | 32 |
| Number of terminals | 68 |
| word count | 524288 words |
| character code | 512000 |
| Operating mode | ASYNCHRONOUS |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 512KX32 |
| Output characteristics | 3-STATE |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | QCCJ |
| Encapsulate equivalent code | LDCC68,1.0SQ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Parallel/Serial | PARALLEL |
| power supply | 5 V |
| Certification status | Not Qualified |
| Minimum standby current | 2 V |
| Maximum slew rate | 0.72 mA |
| Nominal supply voltage (Vsup) | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | J BEND |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
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