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PUMA68S16000ALI-35

Description
SRAM Module, 2MX8, 35ns, CMOS, PQCC68
Categorystorage    storage   
File Size130KB,8 Pages
ManufacturerMOSAIC
Websitehttp://www.mosaicsemi.com/
Download Datasheet Parametric View All

PUMA68S16000ALI-35 Overview

SRAM Module, 2MX8, 35ns, CMOS, PQCC68

PUMA68S16000ALI-35 Parametric

Parameter NameAttribute value
MakerMOSAIC
package instruction,
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time35 ns
Other featuresCONFIGURABLE AS 1M X 16 AND 512K X 32
JESD-30 codeS-PQCC-J68
memory density16777216 bit
Memory IC TypeSRAM MODULE
memory width8
Number of functions1
Number of terminals68
word count2097152 words
character code2000000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize2MX8
Package body materialPLASTIC/EPOXY
Package shapeSQUARE
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formJ BEND
Terminal locationQUAD
512K x 32 SRAM MODULE
11403 West Bernado Court, Suite 100, San Diego, CA 92127.
Tel No: (619) 674 2233, Fax No: (619) 674 2230
PUMA 68S16000/A-020/025/35/45
Issue 4.3 : November 1998
Features
Very Fast Access Times of 20,25,35,45 ns.
• JEDEC 68 'J' leaded plastic Surface Mount
Substrate.
• Commercial, Industrial, or Military Grade.
• User Configurable as 8 / 16 / 32 bit wide
output.
• Operating Power :
• Standby Power : -L Part
• Fully Static operation.
• Single 5V±10% Power supply.
2.86 W (max)
44 mW (max)
Description
The PUMA 68S16000 is a 16Mbit CMOS High
Speed Static RAM in a JEDEC 68 pin surface
mount PLCC, available with access times of 20, 25,
35, and 45ns. The output width is user configurable
as 8 , 16 or 32 bits using four Chip Selects (CS1~4).
The device is available with the option of
independant or single WE control. The plastic de-
vice is screened to ensure high reliability.
The device features low power standby, multiple
ground pins for maximum noise immunity and TTL
compatible inputs and outputs. The PUMA
68S16000 offers a dramatic space saving advan-
tage over four standard 512Kx8 devices.
Block Diagram (see sheet 7 for 'A' version)
Pin Definition (see sheet 7 for 'A' version)
GND
CS3
CS4
NC
WE
VCC
A10
A9
A0
A1
A2
A3
A4
A5
A6
A0~A18
OE
WE
D0
D1
D2
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
8
7
6
5
4
3
2
1 68 67 66 65 64 63 62 61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
D16
D17
D18
D19
D20
D21
D22
D23
GND
D24
D25
D26
D27
D28
D29
D30
D31
512K x 8
SRAM
512K x 8
SRAM
512K x 8
SRAM
512K x 8
SRAM
D3
D4
D5
D6
PUMA 68S16000
VIEW
FROM
ABOVE
CS1
CS2
CS3
CS4
D0~7
D8~15
D16~23
D24~31
D7
GND
D8
D9
D10
D11
D12
D13
D14
D15
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
VCC
A8
NC
A7
GND
A17
CS1
A11
CS2
A13
A14
A18
OE
NC
NC
A12
A15
Pin Functions
Address Inputs
Data Input/Output
Chip Select
Write Enable
Output Enable
No Connect
Power (+5V)
Ground
A0 - A18
D0 - D31
CS1~4
WE
OE
NC
V
CC
GND
Package Details
Plastic 68 J-Leaded JEDEC PLCC
A16
NC
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