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PDM41258LA12SOTY

Description
SRAM
Categorystorage    storage   
File Size276KB,8 Pages
ManufacturerIXYS
Download Datasheet Parametric View All

PDM41258LA12SOTY Overview

SRAM

PDM41258LA12SOTY Parametric

Parameter NameAttribute value
MakerIXYS
package instruction,
Reach Compliance Codecompliant
PDM41258
256K Static RAM
64K x 4-Bit
Features
n
1
2
3
4
5
6
Description
The PDM41258 is a high-performance CMOS static
RAM organized as 65,536 x 4 bits. Writing to this
device is accomplished when the write enable (WE)
and the chip enable (CE) inputs are both LOW.
Reading is accomplished when WE remains HIGH
and CE goes LOW.
The PDM41258 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
compatible. The PDM41258 comes in two versions,
the standard power version PDM41258SA and a low
power version the PDM41258LA. The two versions
are functionally the same and only differ in their
power consumption.
The PDM41258 is available in a 24-pin 300-mil plas-
tic SOJ for surface mount applications.
High speed access times
Com’l: 7, 8, 10, 12 and 15 ns
Ind’l: 8, 10, 12 and 15 ns
Low power operation (typical)
- PDM41258SA
Active: 400 mW
Standby: 150 mW
- PDM41258LA
Active: 350 mW
Standby: 25 mW
Single +5V (±10%) power supply
TTL compatible inputs and outputs
Packages
Plastic SOJ (300 mil) - SO
n
n
n
n
Functional Block Diagram
A
0
A
15
7
Decoder
Memory
Matrix
Addresses
8
9
10
11
I/O
0
I/O
1
I/O
2
I/O
3
• • • • •
Input
Data
Control
Column I/O
CE
WE
12
1
Rev. 2.2 - 4/27/98

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