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BU-63705D1200

Description
MIL-STD-1553 Data Bus Transceiver, CMOS, CDIP78, 45.70 X 53.30 MM, 5.30 MM HEIGHT, CERAMIC, DIP-78
CategoryWireless rf/communication    Telecom circuit   
File Size276KB,27 Pages
ManufacturerData Device Corporation
Download Datasheet Parametric View All

BU-63705D1200 Overview

MIL-STD-1553 Data Bus Transceiver, CMOS, CDIP78, 45.70 X 53.30 MM, 5.30 MM HEIGHT, CERAMIC, DIP-78

BU-63705D1200 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerData Device Corporation
Parts packaging codeDIP
package instructionDIP,
Contacts78
Reach Compliance Codecompliant
JESD-30 codeR-CDIP-P78
JESD-609 codee0
Negative supply voltage rating-15 V
Number of functions1
Number of terminals78
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum seat height5.33 mm
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Telecom integrated circuit typesMIL-STD-1553 DATA BUS TRANSCEIVER
Temperature levelINDUSTRIAL
Terminal surfaceTIN LEAD
Terminal formPIN/PEG
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED

BU-63705D1200 Preview

BU-63705
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®
MIL-STD-1553 DUAL REDUNDANT
REMOTE TERMINAL HYBRID
SPACE-RT-II
FEATURES
Drop in Replacement for BU-65142
Radiation Tolerant & Radiation
Hardened versions for Space Based
Applications
Complete Integrated Remote
Terminal Including:
– Low-Power Transceivers
– Complete RT Protocol
Multiple Ordering Options;
+5V (Only), +5V/-15V, and +5V/-12V
Direct Interface to Systems with
No Processor
High Reliability Screening
DESCRIPTION
The BU-63705, "SPACE-RT-II", is a Hi-Rel radiation tolerant complete
dual redundant MIL-STD-1553 Remote Terminal Unit (RTU). The
SPACE-RT-II is a drop in Replacement for the BU-65142. The device
is based upon two DDC custom ICs, which includes two monolithic bi-
polar low power transceivers and one RICMOS™ protocol chip con-
taining data buffers and timing control logic. It supports all 13 mode
codes for dual redundant operation, any combination of which can be
illegalized.
Parallel data transfers are accomplished with a DMA type handshak-
ing, compatible with most CPU types. Data transfers to/from memory
are simplified by the latched command word and word count outputs.
Error detection and recovery are enhanced by BU-63705 special fea-
tures. A 14-bit built-in-test word register stores RTU information, and
sends it to the Bus Controller in response to the Mode Command
Transmit Bit Word. The BU-63705 performs continuous on-line wrap-
around self-test, and provides four error flags to the host CPU. Inputs
are provided for host CPU control of 6 bits of the RTU Status Word.
Its integrated hermetic package, -55°C to +125°C operating temper-
ature range, and complete RTU operation make the BU-63705 ideal
for MIL-STD-1553 applications requiring hardware or microprocessor
subsystems.
FOR MORE INFORMATION CONTACT:
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
Technical Support:
1-800-DDC-5757 ext. 7771
All trademarks are the property of their respective owners.
©
2005 Data Device Corporation
Data Device Corporation
www.ddc-web.com
DATA
BUS A
ENCODER/
DECODER
BIT
PROCESSOR
BUFFER
TRANSCEIVER
DB0-DB15
BUF ENA
WATCHDOG
TIMEOUT
TRANSFER
CONTROLS
DTREQ
DTGRT
DTACK
DTSTR
R/W
DATA
BUS B
ENCODER/
DECODER
BIT
PROCESSOR
TRANSCEIVER
CURRENT
WORD
COUNTER
M
U
X
A0-A4
A5-A10
COMMAND
LATCH
2
RT ADDRESS
+
PARITY
PROTOCOL
SEQUENCER
AND
CONTROL
LOGIC
STATUS
REGISTER
DAT/CMD
ILL CMD (ME)
SS REQ
ADBC
RT FLAG
SS BUSY
SS FLAG
ERROR FLAGS
MESS ERR
RT FAIL
HS FAIL
RTADD ERR
TIMING FLAGS
NBGT
INCMD
BITEN
STATEN
GBR
16 MHz CLOCK
DDC CUSTOM CHIP
BU-63705
C-02/06-0
FIGURE 1. BU-63705 SERIES BLOCK DIAGRAM
TABLE 1. SPACE-RT-II SERIES SPEC’S
PARAMETER
ABSOLUTE MAXIMUM RATING
Supply Voltage
Logic +5V
Transceiver +5V
-15V (BU-63705X1)
-12V (BU-63705X2)
Receiver Differential Input Voltage
Logic
Voltage Input Range for +5V
RECEIVER
Differential Input Impedance
(BU-63705 X1/X2) (DC to 1 MHz)
Differential Input Resistance
(BU-63705X3)
Input Threshold Level
Direct Coupled (BU-63705 X1/X2)
Transformer Coupled, Measured on
Stub (BU-63705X3)
CMRR (DC to 2 MHz)
CMV (DC to 2 MHz)
TRANSMITTER
Differential Output Voltage
Direct Coupled Across 35
Ω,
Measured on Bus
Transformer Coupled Across 70
Ω,
Measured on Stub
Output Noise, Differential (Direct
Coupled)
Output Offset Voltage, (Transformer
Coupled Across 70 ohms)
Rise/Fall Time
LOGIC
V
IH
(V
CC
=5.5V)
V
IL
(V
CC
= 4.5V)
I
IH
(V
CC
= 5.5V, V
IN
= 2.7V)
16MHz_IN
All other inputs
I
IL
(V
CC
= 5.5V, V
IN
= 0.0V)
16MHz_IN
All other inputs
V
OH
(V
CC
= 4.5V, I
OH
= max)
V
OL
(V
CC
= 4.5V, I
OL
= max)
I
OH
(V
CC
= 4.5V) (Note 1)
I
OL
(V
CC
= 4.5V)
C
IN
(f = 1MHz)
C
IO
(f = 1MHz)
MIN
TYP
MAX
UNITS
TABLE 1. SPACE-RT-II SERIES SPEC’S (CONT)
PARAMETER
POWER SUPPLY REQUIREMENTS
(CONTINUED)
Current Drain
BU-63705X1
-15V (Ch.A & Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
BU-63705X2
-12V (Ch.A & Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
BU-63705X3
+5V (Ch.A & Ch. B)
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
POWER DISSIPATION (NOTE 2)
Total Hybrid
BU-63705X1
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
BU-63705X2
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
BU-63705X3
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
Hottest Die
BU-63705X1
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
BU-63705X2
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
BU-63705X3
• Idle
• 25% Transmitter Duty Cycle
• 50% Transmitter Duty Cycle
• 100% Transmitter Duty Cycle
MIN
TYP
MAX
UNITS
-0.5
-0.5
-18.0
-18.0
6.5
7.0
0.3
0.3
40.0
Vcc+0.5
V
V
V
V
Vp-p
V
kΩ
-0.5
4.0
60
108
175
270
mA
mA
mA
mA
2.5
0.28
0.200
KΩ
1.20
0.860
Vp-p
Vp-p
dB
V
60
120
185
305
mA
mA
mA
mA
40
±10
125
230
335
545
mA
mA
mA
mA
6
18
7
20
9
27
10
Vp-p
Vp-p
mVp-p,
diff
mVp-p,
diff
nsec
V
V
µA
µA
µA
µA
V
V
mA
mA
pF
pF
-250
100
2
150
+250
300
1.475
1.856
2.238
3.000
1.295
1.680
2.065
2.895
0.687
0.92
1.15
1.60
W
W
W
W
W
W
W
W
W
W
W
W
0.8
-10
-400
-10
-600
4
+10
-20
+10
-60
0.5
-8
8
50
50
20
30
0.680
1.010
1.350
2.030
0.290
0.540
0.790
1.290
0.280
0.510
0.750
1.220
W
W
W
W
W
W
W
W
W
W
W
W
POWER SUPPLY REQUIREMENTS
+5V Logic Power
Logic Current Drain
BU-63705X1
+5V (Ch. A, Ch. B)
-15V (VA, VB)
BU-63705X2
+5V (Ch. A, Ch. B)
-12V (VA, VB)
BU-63705X3 (+5V Only)
+5V (Ch. A, Ch. B)
4.5
5.0
5.5
115
V
mA
4.5
5.0
-15.75 -15.0
5.5
-14.25
V
V
4.5
5.0
-12.6 -12.0
5.5
-11.4
V
V
4.75
5.0
5.25
V
Data Device Corporation
www.ddc-web.com
3
BU-63705
C-02/06-0
TABLE 1. SPACE-RT-II SERIES SPEC’S (CONT)
PARAMETER
CLOCK INPUT
Frequency
• Nominal Value
• Long Term Tolerance
1553A Compliance
1553B Compliance
• Short Term Tolerance, ONE sec
1553A Compliance
1553B Compliance
• Duty Cycle
16 MHz
1553 MESSAGE TIMING
• RT -to - RT Response Timeout
• RT Response Time
• Transmitter Watchdog Timeout
THERMAL
• Thermal Resistance, Junction-to
-Case, Hottest Die (ThetaJC)
• Operating Junction Temperature
• Storage Temperature
• Lead Temperature
(soldering 10 sec.)
PHYSICAL CHARACTERISTICS
Size
78-pin Ceramic QIP (BU-63705D)
MIN
TYP
MAX
UNITS
HIGH-REL SCREENING
DDC is committed to the design and manufacture of hybrids and
transformers with enhanced processing and screening for
spaceborne applications and other systems requiring the highest
levels of reliability. These platforms include launch vehicles,
satellites and the International Space Station.
DDC has tailored its design methodologies to optimize the fabri-
cation of space level hybrids. The intent of the design guidelines
is to minimize the number of die and wirebonds, minimize the
number of substrate layers, and maximize the space between
components. DDC’s space grade products combine analog bipo-
lar and rad hard CMOS technology to provide various levels of
radiation tolerance.
The BU-63705 is packaged in a 78-pin ceramic package. In con-
trast to Kovar (metal) packages, the use of ceramic eliminates
the hermeticity problems associated with the glass beads used
in the metal packages. In addition, ceramic packages provide
more rigid leads, better thermal properties, easier wirebonding,
and lower weight.
The production of the space level hybrids can entail enhanced
screening steps beyond DDC’s standard flow. This includes
Condition A visual inspection, SEM analysis, and element evalu-
ation for all integrated circuit die. For the hybrids, additional
screening includes Particle Impact Noise Detection (PIND), 320-
hour burn-in (standard on this device), 100% non-destructive
wirebond pull (standard on this device), X-ray analysis, as well
as Destructive Physical Analysis (DPA) testing, extended tem-
perature cycling for QCI testing, and a moisture content limit of
5000 PPM. TABLE 3 summarizes the procurement screening,
element evaluation, and hybrid screening used in the production
of the BU-63705.
16
-0.01
-0.10
-
0.001
-0.01
40
17.5
8
18.5
768
19.5
10
0.01
0.10
0.001
0.01
60
MHz
%
%
%
%
%
µs
µs
µs
7.55
-55
-65
150
150
300
°C/W
°C
°C
°C
1.80 x 2.10 x 0.21
(45.7 x 53.3 x 5.3)
1.80 x 2.10 x 0.21
(45.7 x 53.3 x 5.3)
1.7
(48.2)
in
(mm)
in
(mm)
oz
(g)
78-pin Ceramic Flat Pack
(BU-63705F)
Weight
Notes (for TABLE 1):
1. Minus sign indicates the direction of current flow.
2. Power dissipation specifications assume a transformer coupled configuration,
with external dissipation (while transmitting) of 0.14 watts for the active isolation
transformer, 0.08 watts for the active coupling transformer, 0.45 watts for each of
the two bus isolation resistors, and 0.15 watts for each of the two bus termination
resistors.
RADIATION TOLERANCE
The hybrids are inherently immune to Latchup. The transceiver is
bipolar/BiCMOS, the digital logic is implemented in a Honeywell
RICMOS™ IV SOI Gate Array (HX2000 Series).
TABLE 2. BU-63705 SERIES
RADIATION SPECIFICATIONS*
PART
NUMBER
TOTAL
DOSE
SINGLE EVENT
UPSET
SINGLE EVENT
LATCHUP
BU-63705
X1/X2
300K
Rad*
1.0 x 10
-8
errors/device-day,
(LET Threshold of
63 MeV-cm
2
/mg)
1.0 x 10
-8
errors/device-day,
(LET Threshold of
63 MeV-cm
2
/mg)
Immune
BU-63705
X3
100K
Rad
Immune
* Consult factory for 1 X 106 Rad Version
*Note: Radiation parameters specified on this data sheet are derived from initial
qualification testing by
DDC
and published data from
ASIC
manufacturers. These
devices have not been evaluated for compliance to the
RHA
requirements stipu-
lated in MIL-PRF-38534,
Appendix G.
Data Device Corporation
www.ddc-web.com
4
BU-63705
C-02/06-0
TABLE 3. HIGH RELIABILITY SCREENING OPTIONS
ELEMENT EVALUATION
Visual Inspection:
Integrated Circuits
Transistors & Diodes
Passive Components
METHOD
MIL-STD-883, Method 2010 Condition A
MIL-STD-750, Method 2072 and 2073
MIL-STD-883, Method 2032 Class S
SEM Analysis for Integrated
MIL-STD-883, Method 2018
Circuits
Element Evaluation:
Visual, Electrical, Wire
Bondability, 24-Hour
Stabilization Bake,10
Temperature Cycles
5000 g’s constant acceleration MIL-PRF-38534
240-Hour Powered Burn-In
and 1000-Hour Life Test
(Burn-In and 1000-Hour Life
Test Are Only Required For
Active Components.)
ASSEMBLY & TEST
Particle Impact Noise
Detection (PIND)
320-Hour Burn-In
(standard on this device)
100% Non-Destructive
Wirebond Pull
(standard on this device)
Radiographic (X-Ray)
Analysis
QCI TESTING
Extended Temperature
Cycling:
20 Cycles Including
Radiographic (X-Ray)
Testing
Moisture Content Limit of
5000 PPM
MIL-STD-883, Method 2020 Condition A
MIL-STD-883, Method 1015
The BU-63705 allows the subsystem host CPU to control 6 of the
bits in the RTU status word. Of particular interest is the Illegal
Command input which may be used to set the message error bit
and illegalize any command word. The BU-63705 provides four
error flags to the subsystem host CPU for evaluating its condition.
In addition a continuous on-line self-test is performed by the BU-
63705 on every transmission. The last Transmitted Word of every
message is wrapped around into the decoder and compared with
the Actual Word. Any discrepancy is flagged as an error.
TIMING
Interfacing the subsystem host CPU to the BU-63705 is simple
and compatible with most microprocessors. FIGURES 4 and 5
illustrate typical MIL-STD-1553 messages for Transmit data and
Receive data. FIGURES 6 and 7 illustrate RT to RT transfers. In
each case NBGT identifies the start of the message, and INCMD
identifies that a command is being processed. The handshake
sequence DTREQ, DTGRT, and DTACK is used to transfer each
word over the parallel data highway. DTSTR and RD/WR are
used to control transfers to RAM memory. GBR identifies a “good
block received”, when a received message has passed all valida-
tion checks and has the correct word count. BUFENA (Buffer
Enable) must be applied to enable the internal tri-state buffers.
ERROR FLAGS
MIL-STD-883, Method 2023
Four error flags are output to the subsystem to provide informa-
tion on the condition of the BU-63705.
1. The ME (Message Error) line goes LOW if any of the follow-
ing error conditions exist:
• format error
• word count error
• invalid word
• sync error
• RT to RT address error
• T/R bit error
2. The RTFAIL (Remote Terminal Failure) line goes LOW when-
ever the results of a continuous wraparound self-test shows
a discrepancy, or a transmitter watchdog timeout has
occurred.
3. The HSFAIL (Handshake Failure) line goes LOW whenever
the system does not issue a DTGRT in response to a
DTREQ before timing-out.
4. The RTADR ERR (RT Address Error) line goes LOW when-
ever the sum of the 5 address lines and parity lines show a
parity error (the terminal will not respond to commands while
this error condition exists).
MIL-STD-883, Method 2012
MIL-STD-883, Method 1010 Condition C
and MIL-STD-883, Method 2012
MIL-STD-883, Method 1018
INTRODUCTION
The BU-63705 is a complete dual redundant Remote Terminal
Unit (RTU). It is fully compliant with MIL-STD-1553B and supports
all message formats. As shown in FIGURE 1, it includes 2 trans-
ceivers and a custom chip containing 2 encoders / decoders, 2 bit
processors, an RTU protocol sequencer and control logic, output
latches, and buffers. With the addition of 2 data bus transformers,
the BU-63705 is ready for connection to a MIL-STD-1553 data
bus.
Data is transferred to and from the subsystem host CPU over a 16-
bit parallel highway, which is isolated by a set of bi-directional buffers.
All transfers are made with a DMA type handshake sequence of
request, grant and acknowledge. Read/write and data strobes are
provided to simplify interfacing to external RAM. Also simplifying the
RAM interface is the availability of a latched command word and an
auto-incrementing word counter. These signals may be used as an
address to map the data directly to and from RAM.
Data Device Corporation
www.ddc-web.com
5
BU-63705
C-02/06-0
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