EEWORLDEEWORLDEEWORLD

Part Number

Search

QS54FCT1280ATHB

Description
Parity Generator/Checker, FCT Series, 9-Bit, Complementary Output, CMOS, CDSO20,
Categorylogic    logic   
File Size303KB,6 Pages
ManufacturerQuality Semiconductor Inc
Download Datasheet Parametric View All

QS54FCT1280ATHB Overview

Parity Generator/Checker, FCT Series, 9-Bit, Complementary Output, CMOS, CDSO20,

QS54FCT1280ATHB Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerQuality Semiconductor Inc
package instructionSSOP, SSOP20,.25
Reach Compliance Codeunknown
Other featuresODD/EVEN PARITY GENERATOR; OPTIONAL REGISTERED COMPLEMENTARY OUTPUTS
seriesFCT
JESD-30 codeR-CDSO-G20
JESD-609 codee0
Load capacitance (CL)50 pF
Logic integrated circuit typePARITY GENERATOR/CHECKER
Number of digits9
Number of functions1
Number of terminals20
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeSSOP
Encapsulate equivalent codeSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
propagation delay (tpd)9 ns
Certification statusNot Qualified
Filter level38535Q/M;38534H;883B
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
The second wave of prizes is out! ! ! Thank you everyone, thank you EEWORLD
A small surprise on the first day of work after the Mid-Autumn Festival, I received the second prize from EEWORLD, the stm32f746. I was really excited. . . . The first prize was the 10th anniversary d...
RF-刘海石 Talking
Using the Quartus II Timequest Timing Analyzer to Constrain and Analyze Designs
Using the Quartus II Timequest Timing Analyzer to Constrain and Analyze Designs...
雷北城 FPGA/CPLD
NV2+GW1N+STM32 infrared thermal imaging data display
[i=s]This post was last edited by littleshrimp on 2022-1-10 12:20[/i]In order to display the thermal imaging data on STM32, the last plan was to use GW1N to convert the parallel data of DS90C124 into ...
littleshrimp Domestic Chip Exchange
Do you know the RS485 interface of MSP430F149?
[p=18, null, left][color=rgb(0, 0, 0)][font=Verdana, Arial, Helvetica, sans-serif][size=3]1. Brief Introduction[/size][/font][/color][/p][p=18, null, left][color=rgb(0, 0, 0)][font=Verdana, Arial, Hel...
fish001 Microcontroller MCU
Please help me find out what is wrong with this simulation excitation
0; LIBRARY IEEE; USE IEEE.Std_Logic_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY ADSIGNAL IS PORT( ADcode: OUT Std_Logic_Vector(15 downto 0); CLKin: BUFFER Std_Logic; Flagreset: OUT Std_Logic); C...
pbabca FPGA/CPLD
【Help】Soft serial port communication problem!!
I simulated the serial port with my own software, using 1121.I sent 24, but the host received 24 FF. I traced the program and saw that it received 24 for the first time, and then received FF.I used th...
hxft Microcontroller MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1583  674  1509  2818  1948  32  14  31  57  40 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号