FCN-745Q060-AU/0 datasheet, PDF

Datasheet> All Categories > The connector> The connector> FCN-745Q060-AU/0

FCN-745Q060-AU/0: DescriptionBoard Connector, 60 Contact(s), 2 Row(s), Male, Right Angle, Solder Terminal, Plug; CategoryThe connector The connector; File Size171KB，4 Pages; ManufacturerFUJITSU; Websitehttp://edevice.fujitsu.com/fmd/en/index.html

Download Datasheet Parametric View All

FCN-745Q060-AU/0 Overview

Board Connector, 60 Contact(s), 2 Row(s), Male, Right Angle, Solder Terminal, Plug

FCN-745Q060-AU/0 Parametric

Parameter Name	Attribute value
Maker	FUJITSU
Reach Compliance Code	unknown
Other features	POLARIZED
Body/casing type	PLUG
Connector type	BOARD CONNECTOR
Contact completed and terminated	PALLADIUM
Contact point gender	MALE
DIN compliance	NO
Filter function	NO
IEC compliance	NO
JESD-609 code	e4
MIL compliance	NO
Manufacturer's serial number	740
Mixed contacts	NO
Installation method	RIGHT ANGLE
Installation type	BOARD
Number of rows loaded	2
Options	GENERAL PURPOSE
Terminal pitch	2.54 mm
Termination type	SOLDER
Total number of contacts	60
UL Flammability Code	94V-0

Preview

Download Datasheet

View All

PC BOARD CONNECTORS

740 SERIES

FEATURES

• Various types of headers are available: one side

shrouded, both sides shrouded, with simplified latch,

and box type.

• The connector having a simplified latch prevents the

connector from working loose because of vibration.

• The mini header has a clip to prevent incorrect

insertion.

• A 740 series connector with a power terminal (2 in 1)

for SCSI/IDE interface unit connections is also

available.

SPECIFICATIONS

1. Standard type

Item

Operating temperature range

Current rating

Voltage rating

Contact resistance

Insulation resistance

Dielectric strength

Insertion force

Withdrawal force

Applicable wire

Applicable PC board (standard)

DC 1 A

AC 250 V

15 mΩ max. (DC 6 V, 0.1 A)

1000 MΩ min. (DC 500 V)

AC 500 V for 1 minute

3.5 kg max. (10 pins), 10.5 kg max. (30 pins)

0.25 kg min. (10 pins), 1.0 kg min. (30 pins)

Flat cable: 1.27 mm (0.050 in.) pitch

AWG #28 (stranded) or AWG #30 (solid)

1.6 mm

Specification

–55°C to +105°C

MATERIALS

1. Standard type

Item

Insulating material

Conductor

Contact

Plating

Terminal

Palladium

Materials

Polyester (UL94V-0)

Copper alloy

Gold

2. Power connector integrated type

Item

Operating temperature range

Current rating

Voltage rating

Contact resistance

Insulation resistance

Dielectric strength

Specification

–55°C to +105°C

DC 1 A (signal pin)

DC 5 A (power pin)

AC 250 V

15 mΩ max. (signal pin, DC 6 V, 0.1 A)

10 mΩ max. (power pin, DC 6 V, 0.3 A)

1000 MΩ min. (DC 500 V)

AC 500 V for 1 minute (signal pin)

AC 1000 V for 1 minute (power pin)

50-contact signal pin: 17.5 kg max.

40-contact signal pin: 14.0 kg max.

Power pin (reference value): 8.8 kg max.

50-contact signal pin: 2.0 kg max.

40-contact signal pin: 1.5 kg max.

Power pin (reference value): 0.8 kg max.

1.6 mm (0.062 in.) (through hole type)

2. Power connector integrated type

Item

Materials

Through hole type:

Polyester (UL94V-0)

SMT type: PPS (UL94V-

Copper alloy

Signal pin contact

Plating

Signal pin tail

Power pin

Gold

Palladium

Solder

Insulating material

Conductor

Insertion force

Withdrawal force

Applicable PC board (standard)

Specifications

subject to change

Dimensions are in millimeters (inches)

www.fcai.fujitsu.com

Recommended Resources

One of the DC power supply voltage limit indication circuits

Current-voltage conversion circuit

PUT battery charger circuit

555 power system cycle measurement circuit

15V VMOS tube regulated power supply circuit

Factors Affecting the Overall Accuracy of ADC: [i=s]This post was last edited by qwqwqw2088 on 2015-7-29 08:21[/i] [color=#a0522d][font=Arial,] The factors that contribute to the overall accuracy of an ADC are usually referred to as the total unad...; qwqwqw2088 Analogue and Mixed Signal

ADC_DAC Basics: ADC_DAC Basics...; 雷北城 FPGA/CPLD

Please advise on the calculation of phase shift of this inverting amplifier: Hello everyone: When the input signal of the inverting amplifier inthe schematic diagram is 50KHZ and the amplitude is 6.8Vp-p, the amplitude of Vout will also be 6.8Vp-p, but the phase leads by 90 de...; PSIR Integrated technical exchanges

[Help] How should I set the pull-up or pull-down resistor for ZYNQ's MIO?: In vivado, the PullType of MIO20 is pull-up. I want to remove the pull-up or change it to pull-down, but these parameters cannot be modified. I also did not find the function to set the pull-up or pul...; littleshrimp FPGA/CPLD

fifo: Everyone posts some fifo papers on the forum, but how to use them in actual design? For example: I want to use FPGA to design something. I want to use an asynchronous fifo, but I can't design it mysel...; heningbo FPGA/CPLD

anananjjj's Beaglebone peripheral circuit design week plan: I didn't expect that I would be among the 16 people!! :shy: As I said before, I participated in this event just to learn from the great people! I don't insist on being selected, no matter what the res...; anananjjj DSP and ARM Processors

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components